There have been periodic requests for which CPU configuration registers to use for various CPUs and which programs are best suited to enable them. Below is a list of the programs and commands I use for various CPUs. If you know of other useful register settings with certain hardware combinations, please share your experience.

Cyrix 486SXL & DLC
I use a program from the SRC_MS folder by Paul Gortmaker called cyrix.exe. My settings are,

DOS
cyrix.exe -i1 -f
you may also need to set -m- if you experience periodic problems with your floppy drive.
some motherboards set L1 to disabled by default. In which case, you need to enable it with -e

You can use cyrix.exe -q to check the current status of the CPU.

For the SXL2, to enable clock doubling, cyrix.exe -cd
To go back to non-doubling mode, cyrix.exe -c

Note that the SXL and SXL2 CPUs always have their L1 cache scheme set to two-way set associative. Cyrix/TI 486DLC processors use the same registers that the SXL uses [for clock doubling], but for changing the L1 cache scheme.

For the DLC, to to set L1 in direct-mapped mode, cyrix.exe -cd
To go back to two-way set associative (the default), cyrix.exe -c

The options are:

1Option			Action
2------			------
3-a[-]			Enable [disable] A20M input.
4-b[-]			Enable [disable] BARB input.
5-c[d]			Two way assoc. [direct-mapped] cache. -cd for SXL 2x mode
6-d			Raw dump of control registers and exit.
7-e[-]			Enable [disable] 1k cache via CR0.
8-f[-]			Enable [disable] FLUSH input.
9-h			Print this help screen and exit.
10-i<n>			Inhibit non-cachable region <n>, where n={1,2,3,4}.
11-k[-]			Enable [disable] KEN input.
12-m[-]			Enable [disable] cache of 1st 64k of each Mb.
13-o			Override check for existence of Cyrix DLC chip.
14-p			Disable all power saving modes.
15-q			Query DLC configuration status and exit.
16-r[-]			Disable [enable] cache of 640k -> 1M ROM shadow area.
17-s[-]			Enable [disable] SUSP i/o.
18-v			Print version number and exit.
19-x<hex>,<size>		Don't cache <size>kb from segment <hex>.

Windows
cyrix.exe -f -m- -xA000,128 -xC000,256
some MB's set Barb and Flush. If you are using Flush, do not set Barb. Deselect the Barb pin with -b-
some motherboards set L1 to disabled by default. In which case, you need to enable it with -e
I beleive -xA000,128 -xC000,256 is the same as using -r and -i1 -i2 -i3 -i4 together, however I use -xA000,128 -xC000,256 instead.

The DLC/SXL chips have L1 cache enabled by default, however the whole 4 GB memory region is set as non-cacheable [by default], which doesn't allow for operation of the L1 internal cache. Use -i1 to inhibit region 1, thereby making this region cacheable. The use of -f enables the FLUSH pin on the CPU, which allows the L1 cache to be invalidated (cleared) when needed. There are various other settings which you might need to enable depending on your specific motherboard/chipset, such as A20M, BARB, KEN, NC0, NC1 and some hardware modifications to the FLUSH, A20M, ADS#, and LOCK# pins, if necessary. You can use cyrix.exe -q to display a list of what registers are currently set and cyrix.exe -h for a list of commands.

If you are using a DMA-capable SCSI controller, such as the Adaptec AHA-1540/1542, and the SXL, SXL2, or DRx2, you will need to use the BARB method to invalidate the cache, cyrix.exe -b . The necessity of -f or -b or neither depends on your motherboard, CPU, and SCSI card. Experimentation may be necessary. If using BARB, and your motherboard has enabled FLUSH, disable flush with cyrix.exe -f-

For a more complete example, I use the following configuration line in my autoexec.bat file when using an AMI Mark V Baby Screamer motherboard + SXL2-66 + AHA-1540, cyrix.exe -e -b -cd -m- -r , however instead of disabling cache of the first 64 KB of each megabyte boundary, you can probably get away with just not caching the first 64KB after the first 1 MB boundary using -x10000,64 instead of -m-

EDIT - 2 Aug 2023:
I've attached information from a newsgroup posting by Ernie van der Meer which documents various motherboard hardware modifications for getting the DLC working. I scanned it myself from a very old printout I had. Refer to the attachment here:

There was also a youtube video by Atheatos which showed that tying #KEN to GND via a 1 K-ohm resistor improved DOOM results by around 6%. He also enabled #KEN via software once he did this. He had #FLUSH enabled in software.

IBM Blue Lightning BL3
For DOS, I use a utility from Evergreen Technologies called REVto486.exe. There is also a driver tool from Kingtston called lght486.exe, but do not use the installer. When using the Evergreen REVto486, add the following to your config.sys file

DEVICE=c:\REVto486.sys /BL /CN /CCM /3

/BL tells the software to setup the registers according to an IBM Blue Lightning CPU
/CN - unknown
/CCM makes the FPU faster.
/3 is for 3x, 2 for 2x, and 1 for 1x multiplier

there is a lot of additional settings which are documented well in the REVTO486 product manual.

DEVICE=c:\lght486.sys /3
/3 is for 3x, 2 for 2x, and 1 for 1x multiplier

The Evergreen driver and the Kingston driver setup the register a little differently. The most notable concerning performance are:

Processor Operation Register, Byte 1, or 1000h:1
Bit 7, CNPX - REVTO486 sets as 1, while LGHT486 sets to 0. The optimal setting is 1. Setting it to 0 drops FPU performance, as witnessed in Landmark Speed from 224.8 to 203.9

Bit 4, XTOUT - REVTO486 sets as 1, while LGHT486 sets as 0. The optimal setting is 0. Setting it to 1 drops DOOM score by 49 realtics.

These two settings can be set optimal using CTCHIP34. The command line option for this would be:
CTCHIP34 IBM486 /1000h:1:=%1xx0xxxx

If you are wanting to place this in autoexec.bat, you need an extra %, that is:
CTCHIP34 IBM486 /1000h:1:=%%1xx0xxxx

If for some reason, it is still not working correctly with autoexec.bat, use HEX syntax (but cannot set don't care's):
CTCHIP34 IBM486 /1000h:1:=8C

Processor Control Register, Byte 3, or 1000h:3
Bit 4, CLP - REVTO486 sets as 0, while LGHT486 sets as 1. Setting this to 1 lets the L1 cache turn off while not in use to save power, but doing so drops 4 realtics in DOOM. However, if you are overclocking your CPU, and given the rarity of these chips now, it may be more beneficial to turn L1 off while not in use.

If you want to force disable of L1 power savings, use CTCHIP34 IBM486 /1004h:3:=%%xxx0xxxx

If you want to force enable of L1 power savings, use CTCHIP34 IBM486 /1004h:3:=%%xxx1xxxx

Many systems have trouble with the IBM Blue Lightning BL2/BL3/DLC3 chip. Use HIMEM with /TESTMEM:on for an initial test. The following HIMEM settings have helped the BL3 work on many of my systems,
/MACHINE:1
/CPUCLOCK:ON

e.g. in config.sys, DEVICE=HIMEM.SYS /TESTMEM:on /CPUCLOCK:on /MACHINE:1 /V

The best outcome appears to be loading the REVTO486.SYS or LGHT486.SYS right before HIMEM with DOS=HIGH,UMB, however this may lead to a HIMEM error. On my SiS Rabbit system, I have thus set /TESTMEM:off and have not witnessed any issues in DOS or Windows 3.11.

Some important observations when using DOS=UMB were,

a) issues with soft-reset.
b) hang when loading speedsys with garbled image
c) cannot display DOOM result after benchmark
d) hang at DOS prompt when exiting Windows 3.11

The issues disappear with DOS=HIGH,UMB.

There are also some slight differences between REVTO486.sys and LGHT486.sys which I have not noticed any performance differences. These are as follows.

Processor Operation Register, Byte 0 or 1000h:0
Bit 6, DBCS, Cache Double Byte Character Set. REVTO486.sys sets this to 0, while LGHT486.sys sets to 1
Bit 1, CPC, Cache Parity Checking. REVTO486.SYS sets to 1, while LGHT486.sys sets to 0

Cache Region Control Register, Byte 3, or 1001h:3
Bits 7-0, LMROR, 1 Meg Read only hi-byte. REVTO486.sys sets this to 00000000, while LGHT486.sys sets to 00010000

Cache Region Control Register, Byte 1, or 1001h:1
Bits 7-9, LMCR, 1 Meg Cacheable hi-byte. REVTO486.sys sets this to 00000011, while LGHT486.sys sets to 00010011

Some general information about upper memory range:
640K - 704K = A0000 - AFFFF (sometimes VGA shadow)
704K - 768K = B0000 - BFFFF
768K - 832K = C0000 - CFFFF = VGA BIOS SHADOW starting at C0000 and SCSI BIOS SHADOW starting at C8000
832K - 896K = D0000 - DFFFF
896K - 960K = E0000 - EFFFF
960K - 1024K - F0000 - FFFFF = SYSTEM BIOS SHADOW

In some conventions, this notation may be represented as:
640K - 704K = A000 - AFFF (sometimes VGA shadow)
704K - 768K = B000 - BFFF
768K - 832K = C000 - CFFF = VGA BIOS SHADOW starting at C0000 and SCSI BIOS SHADOW starting at C8000
832K - 896K = D000 - DFFF
896K - 960K = E000 - EFFF
960K - 1024K - F000 - FFFF = SYSTEM BIOS SHADOW

So if we wanted to identify these as ROMs, then a write to these regions will not be updated in cache. Theoretically, should be more efficient, but why would there ever be writes to these regions if they are reserved to begin with? Anyway, so we would set the Cache Region Control Register Byte 3 (the Hi-byte), 1001h:3 as, 100100xx

Similarly, if we want to have these shadowed regions read cacheable, we'd identify them in Cache Region Control Register Byte 1 (hi-byte0, 1001h:1 as 100100xx

Kingston does identify as default in their driver the loction of the VGA/SCSI BIOS ROM, but not the system ROM.. Curious. Conversely, my Daewoo board, which is BL3 aware, only identifies the system ROM here, not the hard drive controller. Nonetheless, these are the options I have ended up with after loading either the Kingston or Evergreen drivers:

ON MY SYSTEM w/VGA at C0000 and w/SCSI BIOS at C8000:

1CTCHIP34 IBM486 /1000h:0:=%%x1xxxx1x
2CTCHIP34 IBM486 /1000h:1:=%%1xx0xxxx
3CTCHIP34 IBM486 /1004h:3:=%%xxx1xxxx
4CTCHIP34 IBM486 /1001h:3:=%%100100xx
5CTCHIP34 IBM486 /1001h:1:=%%100100xx

If you don't know the location of your HDD controller's ROM, remove the middle 1 and put a 0 on the last two entries.

Cyrix/IBM/SGS Thomson 5x86 [/size]
For DOS, I use a program by Peter N. Moss called 5x86 Register Bit Enabler, Version C2

UMC 8881F/8886BF-based motherboards
(note that LINBRST may need to be disabled on some older revisions of this chipset)

DOS (stepping 0, revision 5 CPUs)
5x86.exe /LSSER=off /FP_FAST=on /MEM_BYP=on /DTE_EN=on /BWRT=on /LINBRST=on /LOOP_EN=off /RSTK_EN=off /BTB_EN=on

DOS (stepping 1, revision 3 CPUs)
5x86.exe /LSSER=off /FP_FAST=on /MEM_BYP=on /DTE_EN=on /BWRT=off /LINBRST=on /LOOP_EN=off /RSTK_EN=off /BTB_EN=on
(S1R3 CPUs do not support BWRT.)

The easiest program to use to adjust the multiplier of the 5x86 is SetMul by G. Broers.

setmul.exe 1 ----> sets multiplier to 1x
setmul.exe 2 ----> sets multiplier to 2x
setmul.exe 3 ----> sets multiplier to 3x
setmul.exe 4 ----> sets multiplier to 4x
setmul.exe HSE ----> sets multiplier 0.5x

Note that a 4x-capable Cyrix 5x86 chip, when booted in 4x mode, can only switch between 1x, 2x, and 4x, not 3x; a 4x- or 3x-capable Cyrix 5x86 chip, when booted in 3x mode, can only switch between 3x and 1x; and a 3x-capable Cyrix 5x86 chip, when booted in 2x mode, can only switch between 2x and 1x.

Win9x (stepping 0, revision 5 CPUs)
5x86.exe /LSSER=off /FP_FAST=on /MEM_BYP=on /DTE_EN=on /BWRT=on /LINBRST=on /LOOP_EN=on /RSTK_EN=on /BTB_EN=off

Win9x (stepping 1, revision 3 CPUs)
5x86.exe /LSSER=off /FP_FAST=on /MEM_BYP=on /DTE_EN=on /BWRT=off /LINBRST=on /LOOP_EN=off /RSTK_EN=off /BTB_EN=on
(I discovered that my particular S1R3 chip, which is rated for 100 MHz, would not load Windows with BTB or RSTK enabled at 120 MHz. For such chips, you can use /LSSER=off /FP_FAST=on /MEM_BYP=on /DTE_EN=on /BWRT=off /LINBRST=on /LOOP_EN=on /RSTK_EN=off /BTB_EN=off. Other reports indicate that BTB will work in Windows at 120 MHz if LSSER=on.)

These settings assume that your motherboard has already set L1 in write-back mode (CR0: CD=0, NW=1, CCR2: USE_WBAK=1). To see a list of which registers are currently set, you can use the Evergreen DOS utility and type ET586.exe /s, or use CTCHIP34.exe cx586.

WinNT4 / W2K (stepping 0, revision 5 CPUs)
For NT4/W2K, I use the Evergreen 586 Driver Setup version 1.0, dated 5/06/96. This loads a driver, ET586NT.SYS, into your Control Panel/Devices folder, and is set to run at System bootup. The values this program requires are in decimal. The settings for NT4 are the same as for Win9x, except that the format is in 8-bit register HEX-to-DEC.

Cache Mode: Write Back Cache
Set Startup Type: Yes, attempt to setup
PCR0 = 5
CCR1 = 2
CCR2 = 214
CCR3 = 28
CCR4 = 56

WinNT4 / W2K (stepping 1, revision 3 CPUs)
PCR0 = 2
CCR1 = 2
CCR2 = 150
CCR3 = 28
CCR4 = 56

These values are stored in HKEY_LOCAL_MACHINE\SYSTEM\ControlSet001\Services\ET586NT\Parameters. Oddly enough, they are stored in HEX in the registry.

SiS 496/497-based motherboards

DOS (stepping 0, revision 5 CPUs)
5x86.exe /LSSER=off /FP_FAST=on /MEM_BYP=on /DTE_EN=on /BWRT=on /LINBRST=off /LOOP_EN=off /RSTK_EN=off /BTB_EN=on

DOS (stepping 1, revision 3 CPUs)
5x86.exe /LSSER=off /FP_FAST=on /MEM_BYP=on /DTE_EN=on /BWRT=off /LINBRST=off /LOOP_EN=off /RSTK_EN=off /BTB_EN=on

Win9x (stepping 0, revision 5 CPUs)
5x86.exe /LSSER=off /FP_FAST=on /MEM_BYP=on /DTE_EN=on /BWRT=on /LINBRST=off /LOOP_EN=on /RSTK_EN=on /BTB_EN=off

Win9x (stepping 1, revision 3 CPUs)
5x86.exe /LSSER=off /FP_FAST=on /MEM_BYP=on /DTE_EN=on /BWRT=off /LINBRST=off /LOOP_EN=off /RSTK_EN=off /BTB_EN=on

These settings assume that your motherboard has already set L1 in write-back mode (CR0: CD=0, NW=1, CCR2: USE_WBAK=1).

WinNT4 / W2K (stepping 0, revision 5 CPUs)
For NT4/W2K, I use the Evergreen 586 Driver Setup version 1.0, dated 5/06/96. This loads a driver, ET586NT.SYS, into your Control Panel/Devices folder, set to run at System bootup. The values this program requires are om decimal. The settings for NT4 are the same as for Win9x, except that the format is in 8-bit register HEX-to-DEC.

Cache Mode: Write Back Cache
Set Startup Type: Yes, attempt to setup
PCR0 = 5
CCR1 = 2
CCR2 = 214
CCR3 = 16
CCR4 = 56

WinNT4 / W2K (stepping 1, revision 3 CPUs)
PCR0 = 2
CCR1 = 2
CCR2 = 150
CCR3 = 16
CCR4 = 56

Cyrix MediaGXm

DOS & Win9x

We want to enable RSTK_EN, LOOP_EN, and FP_FAST, using CTCHIP34 . The command, if you want to type it out in DOS is,

CTCHIP34 cx586 /20h:=%xxxxx1x1
20h refers to the HEX index for Performance Control Register [PCR0]
x = no change
1 = set high
xxxxx1x1 = set high the 0th and 2nd bit of this register (RSTK_EN and LOOP_EN, respectively)

If using in autoexec.bat, add an extra %, so: CTCHIP34 cx586 /20h:=%%xxxxx1x1

CTCHIP34 cx586 /0E8h:=%xx1xxxxx
0E8h refers to the HEX index for Control Register 4 [CCR4]
x = no change
1 = set high
xx1xxxxx = set high the 5th bit of this register, which is FP_FAST.

If using in autoexec.bat, add an extra %, so: CTCHIP34 cx586 /0E8h:=%%xx1xxxxx

If you get an error with this particular index, saying that E8H not found, remember to prefix it with a 0, that is 0E8H. You can also manually go into CHCHIP's GUI to enable FP_FAST as follows,
CTCHIP34 cx586
Hit Page Down until you arrive at E8h
P
5=1
Hold down PG DN to exit.

You can also use a combination of programs to enable FP_FAST, RSTK_EN, and LOOP_EN, but it is messy and not necessary. The first program was in a zip file called CyrixGo.zip. It contains set5x86.exe and free5x86.exe and mentions the author as AEB Software. First run set5x86.exe. It goes through a series of questions concerning which Cyrix 5x86 features you would like enabled. Answer the questions as follows: LSSER = No, LOOP_EN = Yes, BTB_EN = No, RSTK_EN = Yes, BWRT = Yes, WT1 = Yes, USE_WBAK = Yes, DTE_EN = Yes, MEM_BYP = Yes. Unfortunately, there is no FP_FAST option to enable with this program and the program also makes a mess of many other register settings. This program creates a configuration file, 5x86.cfg which is invoked by free5x86.exe.

Place free5x86.exe in autoexec.bat

We now must use 6x86ctl.exe by Ray Van Tassle to fix the mess that free5x86.exe made and to enable FP_FAST. Unfortunately, 6x86ctl.exe does not allow for setting LOOP_EN and RSTK_EN, which is why free5x86.exe was required.

Place the following commands in your autoexec.bat

6x86ctl.exe -n1 -b2
6x86ctl.exe -n2 -b80
6x86ctl.exe -n2 -b8
6x86ctl.exe -n3 -b4
6x86ctl.exe -n4 -b80
6x86ctl.exe -n4 -b20 <------------this particular line enables FP_FAST

It was quite a headache to figure all this out. Unfortunately, free5x86.exe leaves the colour of your DOS font as a reddish pink. Add mode co80 to your autoexec.bat file to bring the colour back to system default. Thanks to Malvineous for this tip.

Cyrix MII

DOS
I use a program called 6x86ctl by Ray Van Tassle and 6x86opt by Mikael Johansson.

6x86ctl.exe -f
What is this? A quote from the readme, "Branch Target Buffer is set to enable far change of flow (FAR_COF)".

6x86opt.exe -l
What is this? A quote from the readme, "Searches for a Linear Frame Buffer and tries to define an ARR/RCR for it allowing Write Gathering."

These are the only two register settings which had any measureable gain on my system. NO_LOCK and WT_ALLOC are enabled by default. If your board does not have write allocate enabled by default, you can use 6x86cfg.exe by Olivier Gilloire.

6x86cfg.exe -WA ------> Set this to enable write allocate

If your board do not have NO_LOCK enabled by default, you can use Fast'n'Slow, Fass.com, by Serge Ivanov

FASS.com /C ------> Set this to enable NO_LOCK

Win9x/NT4/W2K/XP
I use the Powerleap CPU Control Panel and set it to load at system boot. The settings I have with a check box are:
CPUID, Negate Lock#, Write Allocate, Use SMM, No Delay I/O Recovery, SUSP#, SUSPA#, Lower Power Suspend.
Caching regions A0000-BFFFF and Main memory set to W.G.

Cyrix 6x86

DOS & Win9x
I recall only NO_LOCK had any measureable performance gain.
FASS.com /C

My motherboard, a VIA MVP3-based board, has LINBRST set to 1 by default. I think many boards which support LINBRST should have it enabled, otherwise it is likely not supported. Intel 430TX boards do not support Cyrix's LINBRST feature.

VIA C3 Nehemiah

DOS & Win9x
I use Setmul by G. Broers to set the multiplier to 10.5x, allowing the CPU to run at 1.4 GHz.

setmul.exe 10.5

Setmul also contains other useful slow down features, like disabling cache and branch prediction.

NT4/W2K/XP
I use CrystalCPUID v4.15.5.452 to set the multiplier. This program has a startup program option which puts a link into your startup folder. Mine looks like this,
CrystalCPUID.lnk with target: "C:\CrystalCPUID.exe" /F20 /P1 /E

AMD K6
The BIOS in my 430TX board was modified by Jan Steunebrink to support Write Allocate. If you have a modified BIOS from J. Steunebrink, the System, and sometimes Video, BIOSes must be set to non-cacheable. For software enabling, you can try,

Fass.com /a

or

K6waon

A nice compilation of K6-2 utilities can be found here: https://www.philscomputerlab.com/k6-2-2-3-resources.html