The documentation just says that the 'first write' to the accelerator aperture causes the internal X/Y count register low 8-bits to be loaded with the writen value.

Anyone knows what happens to succeeding writes after that, if any? Does it go into SSO mode (the SSO bit being set)?
Does it actually load the X or Y Count register in the mode 4/5 in the Routing Control register?

The documentation seems quite unclear about how exactly it works?