Reply 31880 of 31881, by Nexxen
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tehsiggi wrote on Today, 12:29:Nexxen wrote on Today, 11:55:tehsiggi wrote on Today, 11:45:So lunch break was very fruitful. […]
So lunch break was very fruitful.
The idea to remove the GPU VRM from the HD3450 AGP was a mistake. It appears the 1.2V from it are used for the Rialto bridge as well. Which is interesting, since the normal HD3450 uses 1.1V - so they bumped the VDDC to re-use that voltage for Rialto.
I just fed it from one of my lab supplies and it is loaded with around 0.75A - which is not nothing.
So I went ahead now and put the VRM back in.However the most important discovery:
The HD3450 PCIe gets enumerated through my zombie HD3450 connected by PCI x1 - can't use it, but this is already a good sign. Cross changing to an X700 causes POST stuck at code 25 - so it looks like rialto is doing some lookup. More to investigate. But before I go ahead and wire 16 PCIe lanes, I think I'll roll out a PCB with a rialto on it. fun times ahead..Way to go..
I thought the documentation on the Rialto to be widely available.
Interesting work. This is SF tinkering 😀One would think Rialto is already "open" in a sense of information. But no. The BIOS parts are basically unknown (well, not to me that much anymore) - and hardware wise there's also a lot of unknowns.
So I'm doing the digging now - step by step..
Yep, this is work bit by bit. No pun intended.
I'm curious to know how it ends. Maybe open a dedicated thread.
PC#1 Pentium 233 MMX - 98SE
PC#2 PIII-1Ghz - 98SE/W2K
- "One hates the specialty unobtainium parts, the other laughs in greed listing them under a ridiculous price" - kotel studios
- Bare metal ist krieg.