First, let's keep in mind a few things:
1) Systems with a BIOS date older that June 1994 don't often support LBA drive geometries or CHS drive geometries larger than 1024 Cylinders, 16 Heads, 63 Sectors/Track (without adding an option rom or a drive overlay) The BIOS might let you configure larger values, but the results can be unpredictable.
2) You need Win95B (DOS 7.1) or newer to access drives with Cylinders > 1024
3) No versions of DOS support heads > 255 or sectors > 63
4) IDE devices are flexible and will try to match themselves to what ever geometry you configure, and the results are unpredictable if you configure a geometry larger than your storage device
5) CHS Drive geometry settings are like a Kaleidoscope. If you don't have it configured the same way on each system, you won't get the same picture.

So that said:
Does the drive geometry in the 386 BIOS conform to items 1-4 above?
Does the drive geometry in the 386 BIOS match the drive geometry used by the 486 when you set it up?
Does the 486 have an option ROM that might override BIOS drive geometry at boot time?
Is the IDE cable plugged in backwards?

If the first two are true and the last two false, I'd consider swapping out the IDE controller on the 386 as a test. The ISA IDE controllers do go bad.

Thanks for the reply.

The configuration I had on the 386 with the 2gb CF card was 3970C 16H and 63S, which gave 1954MB. I think the bios says 1992, but this config definitely worked, this 386 setup is an oddity in itself, so I don't know. The 486 boards that I have will only let you type in 1024 cylinders. I created a CF card with a 504mb partition using 1024C, 10H, 63s, but no dice.

When swapping drives around I made sure to match geometry, although I couldn't use my 2GB card on the 486s obviously. I would swap IDE controllers around, however I only have one that I just bought. I do have a newer 16bit ISA sound blaster with an IDE header on it, but I don't know if that is only for optical drives. I did try that SB card, but got similar results.

If the geometry doesn’t match, you are not going to be able to swap between systems.

In your situation, I’ve had good luck if I put this on the drive :
http://vogonsdrivers.com/getfile.php?fileid=1900
It will override your BIOS drive table geometry with LBA or autodetected CHS settings before DOS loads.

The IDE port on the sound card is likely configured to be a second or third controller. Most BIOS from that period only boot from the primary IDE controller.

Is the drive readable/writable when you boot from floppy?
You may then (again) reconfigure the drive

In bios:
Limit the drive to the known 504 limit . In my experience most CF are very tolerant of the CHS you use so this should work.

Boot to Dos floppy disk
Fdisk remove all partition data
Reboot
Fdisk create partition
Reboot
Fdisk /MBR command to rewrite master boot record
Reboot
Format c: /s
Remove floppy and reboot

I did get the cards to work in the 386 and on the I/O controller today, I have no idea what changed, which is the most annoying type of fix.

Thanks for the tip on the sound card IDE, that makes sense.

I am still puzzled how the bios accepts 3970 cylinders and works when everything is telling me that it should only support 1024 cylinders and 504Mb. I can tell that it is not 100% correct, because the 386 calculates 1954mB, but the 486 calculates 950ish Mb with the same settings. I guess regardless I will use 1024 cylinders from now on to avoid any issues.

Out of curiosity, I have one of these; https://shop.bluelavasystems.com/products/xt- … nterface-xt-ide with a bad ROM chip. As far as I am aware the ROM only contains the XT-IDE bios, Is it possible to use this device without the ROM? I noticed that it has a ROM enable switch, under what circumstances would you not want to use the ROM?

Alex_03 wrote on 2024-07-14, 00:27:

I am still puzzled how the bios accepts 3970 cylinders and works when everything is telling me that it should only support 1024 cylinders and 504Mb. I can tell that it is not 100% correct, because the 386 calculates 1954mB, but the 486 calculates 950ish Mb with the same settings. I guess regardless I will use 1024 cylinders from now on to avoid any issues.

It's impossible to express A cylinder number of 1024 or higher in the Int13h disk interface between operating system and BIOS, but totally possible to specify more than 1024 cylinders in the CMOS and therefore in the Fixed Disk Parameter Table.

Allowing "NORMAL" mode (in Award terminology) but more than 1024 cylinders (meaning DOS would not be able to get beyond cylinder 1024) was apparently used by operating systems that used direct disk access yet relied on the FDPT to get the geometry information rather than ATA IDENTIFY. Such an approach would be necessary to support MFM/RLL disks. It could include things like Xenix and NetWare. http://www.os2museum.com/wp/the-fixed-disk-parameter-table/

Interesting, thanks!

I know it's been a minute since I posted on this thread, but I have been tinkering with a 486 motherboard and am having problems with the ide controller.

The board is a Zida 4DVX (it can be found on the retro web, I have attached the quick setup guide), I have a i486DX-50 installed with 8mb of memory and 128k cache. The IDE controller I am using is a VLB one with a promise PDC20230C ide chip.

When I turn on the system after the cmos has been cleared, I can get into the bios and change settings. However after the first power up the board will hang at the "wait" prompt with a flashing cursor just after the memory test. Once this happens I cannot seem to get into the bios with any key press, this is an AMI bios so it should be <del> right? I have a pc analyzer card with a hex readout on it, whenever it hangs like this it reads "8d8c" on the display. The analyzers manual says that "8d"(ignoring the right two characters in an 8-bit ISA slot) is when it is attempting to reset the hdd controller, I generally take that manual with a grain of salt, however in this case it is backed up by the fact that the hdd access led it always lit when it hangs. So it would seem like there is an issue with the hdd controller initialization? I have verified all the jumper settings for a 50mHz 486.

I am not sure what things to test, unfortunately my hardware options are limited since I don't have any other ide controllers to try. I might try booting off of a floppy with this same VLB card when I get a chance.

To verify that it's a 50 MHz bus issue, what if you temporarily drop it to 33 or 25 MHz?

Yes I suspect the fast bus could be the problem and the VLB HD controller finally gave out at that speed.
On another topic, a minute is 60 seconds or 1/60 of an hour, not near 3 months 🤣

Horun wrote on 2024-10-07, 03:47:

Yes I suspect the fast bus could be the problem and the VLB HD controller finally gave out at that speed.
On another topic, a minute is 60 seconds or 1/60 of an hour, not near 3 months 🤣

It's a turn of phrase, 🤣

I set all jumpers for a 486DX-25, no luck. I verified that the ISA bus was running at 6.3MHz and the VLB bus at 25MHz with a scope. Presumably the other board was also running the bus at 50MHz, it worked fine.

I tried a booting from a floppy with the hdd disabled in bios, still not boot and the same 8d8c.

I removed the vlb i/o card completely and the system still hangs on the wait prompt, but with a different code, this time it is A1A0. The manual for the analyzer card does not suggest what this code mans for an AMI bios.

Disable external cache?

So I disabled the external cache and got some interesting results.

With the vlb card installed in a vlb slot the computer will not pass code "8d", regardless of a drive being specified in the bios or not, this hasn't changed. Without the card however, the machine will post perfectly fine now that the cache is disabled. I also discovered that you can put the vlb card in a non-vlb 16-bit isa slot, then the computer will post and I can boot the machine from floppy.

This is puzzling, it seems like I have two independent problems, one with the ide controller and one with external l2 cache. There are a number of jumpers around the ide controller, I need to find a manual and verify those settings.

As a sanity check I reinstalled the cache for another test and the board posted then reset itself 4 times before hanging on "A1" again. I have no idea what is going on here, I will test the cache in my other board, but I am suspecting a failure on the motherboard somewhere.

The fdc is on isa and the ide on vlb, that’s why it can boot when not in vlb slot.

I would lose the vlb controller and just use an isa one; I have to date only had frustration with vlb stuff.

st31276a wrote on 2024-10-08, 18:15:

The fdc is on isa and the ide on vlb, that’s why it can boot when not in vlb slot.

I would lose the vlb controller and just use an isa one; I have to date only had frustration with vlb stuff.

I agree, a purely ISA controller would be nice, I will look for one as I have boards with no VLB, just ISA.

Despite that I would like to figure out why the VLB card does not work, since it works on other systems. Plus I need to troubleshoot the cache weirdness.

I don't know enough about how cache is set up on some boards, but it could be that I am not doing it correctly.

I have eight 32k by 8 sram chips, so the setup that I have been using is four installed as one bank for 128k, and then I use another for the tag chip. I noticed that most motherboards only require an 8k by 8 sram for the tag when you have 128k total cache installed. On my other board it works perfectly fine with a 32k chip as the tag, would it be possible that this other board does not like the 32k chip? also there are two tag sockets, which is somewhat confusing.

I figured that an 8k and a 32k chip would be pin compatible in a 22 pin dip, just that the 8k would be missing 2 address lines, so using a larger one than needed wouldn't cause problems.

That is my understanding too of tag chips. A 32k for tag when cache is small will only address what is necessary if the tag is bigger than required.

I looked in the manual on the retro web, cache timing seems abysmal for this board. 3-2-2-2 timings look like dram, if cache is timed like that it is no wonder it is as slow as dram.

Its unlikely but possible the Tag socket doesnt have all address lines wired, dangling address line will make sram pick random values.