You'll have to explain what do you mean specifically, because ISA bus does not multiplex the address and data lines.

In theory anything multiplexed is slower than dedicated lines. But in practice the impact of multiplexing could be hidden in the latencies of protocols, or in speed differences between the multiplexed device and communication bus. Your device could be super fast, but being connected to a super slow ISA bus you could send your data not only muiltiplexed, but even serially over some sufficiently fast 4-bit SPI link.
If your device is not superfast, then additional delay for multiplexing may require inserting wait states on the ISA bus, in those conditions direct lines will be better than multiplexed, as they will not require additional wait states.

vstrakh wrote on 2025-01-23, 10:02:

You'll have to explain what do you mean specifically, because ISA bus does not multiplex the address and data lines.

In theory anything multiplexed is slower than dedicated lines. But in practice the impact of multiplexing could be hidden in the latencies of protocols, or in speed differences between the multiplexed device and communication bus. Your device could be super fast, but being connected to a super slow ISA bus you could send your data not only muiltiplexed, but even serially over some sufficiently fast 4-bit SPI link.
If your device is not superfast, then additional delay for multiplexing may require inserting wait states on the ISA bus, in those conditions direct lines will be better than multiplexed, as they will not require additional wait states.

i mean, that some video chips have multiplexed bus address and data pins, which means these pins would be connected to both address and data lines of the isa slot. there must be certain logic to switch between them though.
a few chips even use multiplexed address and data lines to access video ram, uncommon though, namely oak037 and chips441.

With slow ISA bus it doesn't matter much if the chip has multiplexed buses or not.
A single cycle on the ISA bus (8MHz clock) gives time for many in-chip cycles (25+MHz), so multiplexing the pins and latching them in external register for ISA interconnect makes no impact on communications whatsoever, unless the video chip in question is extremely slow on its own.

As for the video ram - because of the required onboard memory capacity and the limits on the pin count the ram chip can have - the memory chips already employ the address lines multiplexing (i.e. RAS/CAS), so multiplexing address/data lines on the video chip is easily pipelined with video ram address multiplexing. The costs of multiplexing address/data on video chip is amortized by the overheads of video ram interfacing protocols.

So whether is something multiplexed or not - the actual performance answer depends on the relations with the environment. The direct lines are better when things happen in a single clock pulse, one new transfer per clock, synchronously through the whole system. Otherwise the multiplexing costs will have negligible impact (if any at all) when the extra time required for multiplexing coincide with waiting for other bus, waiting for speed difference with other device, waiting for address multiplexing on ram chips, etc.