There is a TI pdf that explains exactly the correct way to put the slc2 in a 5v system , I will post the relevant passage later when I get back home.
Basically you need 3.3v for vcc pins except one that you feed 5v since the bus is 5v.

I have also seen several statements on the web that the chip will just work fine - some posts are even from upgrades done in late 90s - provided there is some cooling on the chip.

Personally if I was to do it I would do what TI says on that datasheet with a 3.3v regulator, just to be on the safe side since these upgrades generally go into systems someone cares about .

The ceramic version should dissipate heat better than the plastic one.

keropi wrote on 2025-03-03, 10:35:

There is a TI pdf that explains exactly the correct way to put the slc2 in a 5v system , I will post the relevant passage later […]
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There is a TI pdf that explains exactly the correct way to put the slc2 in a 5v system , I will post the relevant passage later when I get back home.
Basically you need 3.3v for vcc pins except one that you feed 5v since the bus is 5v.

I have also seen several statements on the web that the chip will just work fine - some posts are even from upgrades done in late 90s - provided there is some cooling on the chip.

Personally if I was to do it I would do what TI says on that datasheet with a 3.3v regulator, just to be on the safe side since these upgrades generally go into systems someone cares about .

The ceramic version should dissipate heat better than the plastic one.

Thank you Keropi (love the Orpheus II buy the way).

I'll be doing the upgrade on a 386SX soldered on a mainboard for testing but also on a Vortex Golden Gate bridgeboard with a 386SX installed.

I'm a bit worried doing the upgrade on the bridgeboard though, since the value of these cards skyrocketed in the past years. I don't want to damage the board because of a overheating processor.

Thanks for the kind words!

I have seen several people on amibay that did the GG upgrade without issues - just needs a heatsink/fan
Also there was one person there that said he did this upgrade in the 90s and it works perfect since then at 5v .
I used to have a gg486 as well , great bridgeboards but ultimately one must treat them as a beefed up 386sx

here is the relevant passage:

source: https://www.ardent-tool.com/CPU/docs/TI/design.pdf

it describes how to convert an existing 486slc processor system but the same would apply to a 386sx one - with the added chore of finding a BIOS that has the option to enable L1 cache

if you do upgrade your system please report back - I am thinking of upgrading my amstrad cyrix 486slc33 motherboard with the TI chip

The G50 does work at 5v reliably, but it does need a heatsink & fan.

25mm Raspberry Pi heatsink & fans can keep it cool.

They can overclock to 100Mhz, but it may make no difference between single/double-clock due to the memory bottleneck.

It can't be soldered with a heatgun and reliably double-clock. The package max temperature is low and similar to in use/not in use.

The BIOS needs to know about the 486 chip, and you need to use the Cyrix.exe utility to turn the cache on after system boot. Eg. "Cyrix.exe -b- -f -m". Clock double is "-cd".

DMA access (floppy program execution, and other) do not work unless the CPUs FLUSH# pin (pin 30) is connected to MEMW from the ISA bus.

KEN# (pin 29), FLUSH# (pin 30), A20# (pin 31) are typically connected on a 486SLC compatible motherboard.

The KEN# pin (active when high) can turn on the cache, or the BIOS can, or the Cyrix utility can.

keropi wrote on 2025-03-03, 11:53:

here is the relevant passage: […]
Show full quote

here is the relevant passage:

source: https://www.ardent-tool.com/CPU/docs/TI/design.pdf

it describes how to convert an existing 486slc processor system but the same would apply to a 386sx one - with the added chore of finding a BIOS that has the option to enable L1 cache

if you do upgrade your system please report back - I am thinking of upgrading my amstrad cyrix 486slc33 motherboard with the TI chip

Thank you very much Keropi! I will let you know when the upgrade is completed.

MikeSG wrote on 2025-03-03, 12:40:

The G50 does work at 5v reliably, but it does need a heatsink & fan. […]
Show full quote

The G50 does work at 5v reliably, but it does need a heatsink & fan.

25mm Raspberry Pi heatsink & fans can keep it cool.

They can overclock to 100Mhz, but it may make no difference between single/double-clock due to the memory bottleneck.

It can't be soldered with a heatgun and reliably double-clock. The package max temperature is low and similar to in use/not in use.

The BIOS needs to know about the 486 chip, and you need to use the Cyrix.exe utility to turn the cache on after system boot. Eg. "Cyrix.exe -b- -f -m". Clock double is "-cd".

DMA access (floppy program execution, and other) do not work unless the CPUs FLUSH# pin (pin 30) is connected to MEMW from the ISA bus.

KEN# (pin 29), FLUSH# (pin 30), A20# (pin 31) are typically connected on a 486SLC compatible motherboard.

The KEN# pin (active when high) can turn on the cache, or the BIOS can, or the Cyrix utility can.

Thank you MikeSG! This is very usefull information!

I'll be using a hot-air desoldering station to remove the chip and solder it with a very small solder bit and microscope. I built a few Amiga accelerators this way and also repaired mainboards/pci cards.

excellent - I will be monitoring this thread
my plan is to eventually upgrade this motherboard - it already has proper support for L1 and L2 cache and I hope that at least the 8kb of L1 will make some meaningful difference

I transplanted the Ti486SLC2 onto a 386SX-25 mainboard today:

The board boots and recognises the new processor. But some work needs to be done because the mainboard doesn't work with floppy/hard drive with emulation through PicoMEM.

The PicoMEM worked before the transplant, but refuses to boot from an image after the transplant. I probably have to make MikeGS's modifications to make the board fully work.

HomeLate wrote on 2025-03-13, 13:33:

I transplanted the Ti486SLC2 onto a 386SX-25 mainboard today:

Whoah! Frankenstein!

Does it run at 25Mhz externally and 50 Mhz internally?

douglar wrote on 2025-03-13, 16:28:

HomeLate wrote on 2025-03-13, 13:33:

I transplanted the Ti486SLC2 onto a 386SX-25 mainboard today:

Whoah! Frankenstein!

Does it run at 25Mhz externally and 50 Mhz internally?

I think so, I'm not completely sure but it should.

For now ISA cards like the PicoMEM or XT2IDE are no longer working (these did before I replaced the processor).

run some benchmark that will display the speed, I think you need some utility to enable clock doubling
also probably the L1 cache is disabled, unless there is a bios option for that
use something like cachechk so we can see some details

HomeLate wrote on 2025-03-13, 16:40:

For now ISA cards like the PicoMEM or XT2IDE are no longer working (these did before I replaced the processor).

I'd like to think it was something as simple as the ISA bus running too fast, but why would that be?

Is there a different pinout on the 486SLC2 that could be causing the issue?

douglar wrote on 2025-03-13, 20:20:

HomeLate wrote on 2025-03-13, 16:40:

For now ISA cards like the PicoMEM or XT2IDE are no longer working (these did before I replaced the processor).

I'd like to think it was something as simple as the ISA bus running too fast, but why would that be?

Is there a different pinout on the 486SLC2 that could be causing the issue?

The mainboard has a bios setting for setting the ISA-bus speed. Standard it is set to PROCCLK/5. Setting it to an higher devider doesn't fix it unfortunately. Other options are PROCCLK/2, ../3, ../4 and ../6. With set at /5, I measure 10Mhz on the ISA-bus so I figure it's actually running at 50Mhz. Setting it to /6, reduces the speed to 8.4Mhz.

The PicoMEM and XT2IDE can be configured when the system is booting, but it locks up when it tries to boot from the CF of dos image (PicoMem).

The floppy doesn't work either. It is recognised during boot, but it fails to boot from floppy.

HomeLate wrote on 2025-03-13, 21:02:

The floppy doesn't work either. It is recognised during boot, but it fails to boot from floppy.

So that’s probably an Isa bus issue too. The pico is going to use memory mapped transfers. The floppy is going to use DMA.