First post, by riplin
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- Newbie
Matrox Mystique PCI BIOS disassembly here.
Matrox G100 AGP BIOS disassembly here.
Matrox G200 AGP BIOS disassembly here.
Matrox G200 PCI BIOS disassembly here.
Matrox G400 AGP BIOS disassembly here.
Some quick analyis:
- The G200 AGP and PCI BIOSes are almost the same, they could have been merged, there's only two places that really differ; the AGP bus setup and the device ID (The PCIR structure is what's holding this back since the device ID's differ).
- The G400 is very close to the G200 code base, with only G400 specific stuff different.
- The G100 BIOS is clearly older than the other BIOSes. At some point they replaced the VESA implementation in this codebase. There are also a number of bug fixes missing in this BIOS (mostly to do with disabling interrupts during sensitive operations). The code is smaller, yet feels more wasteful with large tables.
- All BIOSes check to see if they are running on an Intel Triton 430FX chipset and if that's the case, they configure the video card to not do retries (this is in violation of the PCI spec according to the datasheet).
- All BIOSes check to see if they are running on an ALI Aladdin V chipset and if that's the case, they configure the chipset to disable fixed VGA Framebuffer.
- All BIOSes reboot the chip on startup and they take their sweet time. This is probably why it takes so long for these cards to show an image on startup.
The BIOSes all love to call back into their own interrupt handlers with functions that they themselves don't implement, leading me to believe it's depending on something like UNIVBE or some other extension to help them.
They also call back into themselves for other reasons which makes figuring out what it's doing really annoying.
I focused on the memory timing stuff and I think I found a "bug" in the G200 BIOSes. It's loading a default timing value that's meant for the G100 card (the value is the same as the G100, but the register has changed and now bits are falling in reserved sections).
I also tried figuring out the DDC code, but that's pretty dense to get through.
If anyone has any more information or wants to help, let me know!
Edit: some more findings:
The G100 BIOS also doesn't cache the PCI Bus, Device ID and Function ID of the card, so every time it needs to talk to the PCI configuration space (which is a lot), it searches for the card all over again. This is all IO space comms, so it's pretty slow. The G200 and G400 BIOSes cache this value.
There is also speed sensitive code in there. A few places doing jumps to the next instruction between IO operations and a couple places that run an empty loop for a number of cycles.
There is some vestigial data and code in these BIOSes that could be cleaned out. Some places also have inefficient instruction encodings that can be fixed.
There is a print screen handler in all of them that’s pretty useless.
Some functions could have their input and output registers reshuffled to make them more easy to use, saving more instructions.
Also a bunch of nops in functions and between functions and data (for alignment). Some of the nops in functions result in misaligned code. Go figure.
I wish the creator of GX00VBE would open source the code so those extra VESA modes could be put in.