Chicony CH-471B enabling Am5x86 L1 WB operation \ VOGONS

Chicony CH-471B enabling Am5x86 L1 WB operation

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First post, by majestyk

Posted on 2025-07-07, 07:57

majestyk Offline

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Rank: Oldbie
Posts: 1528
Joined: 2020-12-04, 09:13

I couldn´t find any sufficient how-to for this on the net so I tested the settings out for myself.

Here´s an overview of the whole mainboard:

The attachment ch471_total.JPG is no longer available

and here you can find the details focusing on the settings for Am5x86, WB L1 at 160 MHz:

The attachment ch471_wbop.jpg is no longer available

Please note the original (VOBIS) BIOS (tried 1.06 and 1.08) refuses to boot anything DX4 / 5x86 with multiplier set to x2, it also reduces speed to 66MHz as soon as 100MHz is exceeded.
I used Jan´s BIOS for the ABIT AB-AH4 instead and adjusted the registers for DIRTY-TAG L2 operation. This improves memory performance (while halving the cacheable area).

The attachment AH4_J_w_L2_Dirty_TAG.7z is no longer available

The result is the usual speedsys chart for a decent SiS 471 mainboard:

The attachment ch471_speedsys.JPG is no longer available

Both the Appian VLB IDE- and floppy-ports are working, COM1, COM2 and LPT-ports are listed in BIOS summary, they cannot be configured in BIOS, but there are jumpers for all the settings.

I tried to trace the CPUs "INV" pin, but didn´t detect any connecitons to a jumper, or the chipset. There´s also no connection to the CPU´s "W/R" pin. Not sure if this matters?

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