First post, by adegn
Hi
I have been working on a custom bios for my SPEA V7 Mirage ISA - S3 86c801 for a while now. The point of my project is to get the modes 1024x768 @8bpp and 1024x768 @16bpp to default to a progressive mode instead of the BIOS default 43Hz interlaced. CRT displays may show 43Hz interlaced just fine, but my TFT doesn't allow frequencies below 50Hz and it doesn't understand interlaced. I tried 50Hz interlaced without success - but a funny thing was that 36.5Hz intelaced was recognized by my monitor as 720x800. In windows it looked horrible,
I managed to get 1024x768 @8bpp to do that by default - it now defaults to 72Hz progressive scan
But 16bpp is a bit of a struggle. I have been working on the cards bios internal mode 0x77 and managed to get it to more or less work at 50Hz. But the last month I have been testing many different register settings and one problem remains - no matter what I do - though the vertical position may vary depending on settings.
In this image, you can see the problem
As you see, the leftmost 512px are drawn perfectly fine. The following 64 px are also placed correctly - but then the following 64 px are repeated twice before the rest of the picture is painted. Because of the line width of 1024 px, of course the rightmost 64 px are outside the picture drawn on the monitor.
Depending on register settings, the repeated 64 px vertical band can be band 8-9, 9-10, 10-11 or 11-12
Here, flicker is visible - se the number 8/5
or an even more awkward mix
Besides experimenting with the register settings, I have also replaced my DRAM in Bank 1 with 60ns chips - but it didn't change anything compared to the 70ns chips I had.
Note that the doubled band is not a sharp and clean doubled band - on the left side of the band, there is some visible flickering - but that is not visible on my test image because the colors are not changing in the doubled bands area
Any ideas what is going on here?