Why does tag ram have to be faster?

Same speed should suffice.

Why does tag ram have to be faster?

It doesn't... not in the way that feipoa is thinking. The misunderstanding is that, yes, the TAG does typically need to be a little faster than the cache chips, but all that means is, if you have a 15ns TAG and 15ns cache, you probably won't be able to take full advantage of the 15ns speed of the cache chips... they'll have to be run slightly slower. It'll still work fine. The TAG chip can even have a slower rating than the cache, as long as you add some wait states to account for it.

I blindly took this assumption from here,
http://www.pcguide.com/ref/mbsys/cache/funcTag-c.html

Last line of the page reads, "This means that no matter how fast the cache data store is, the tag RAM must be slightly faster."

Perhaps I have misinterpreted the above sentence?

Yes and no, what it says is indeed true, but you're sort of misinterpreting it.

If your TAG chip can only allow 'X' ns operation, then your cache can only operate, at best, at maybe 'X+1' or 'X+2' ns... accounting for however many additional clock cycles are required for the cache controller to lookup the data it finds from the index in the TAG. So with a 15ns TAG, your cache accesses can't be any faster than 16 or 17ns, regardless of the speed rating of the cache chips. You can still use 15ns, or even 12ns rated cache chips in such a situation, you just won't be able to run them any faster than 16 or 17ns. It basically amounts to underclocking the cache chips.

I didn't mean to ask the same question twice up there, I was responding to Tetrium when your post crossed mine.

Ok, that makes sense. There is an intermediary with timing control. Thank you very much for your detailed explanation.

There is still an open question that maybe you also have some foresight to. Will using a 1024 Kbit TAG RAM when a 512 Kbit TAG RAM is called for enable proper operation?

Above discussion encouraged me to test 12 ns and 15ns tag ram on GA-5486AL motherboard.

I have used following bios settings:
EDO,60ns DRAM or 40MHz CLK: Disable
DRAM Read Timing:Fastest
DRAM Write Timing:Fastest
SRAM Read Timing:2-1-1-1

Motherboard bios is dated to May 20 1996 (Rev. 1.07).

Cache chips:
12ns tag ram:"W24129AK-12"
15ns tag ram: "W24129AK-15"
15ns cache modules:4 x "UM61512AK-15"

##################################
TEST ->cachechk16
PROCESSOR ->am5x86 133MHz

*12ns TAG* | *15ns TAG*
L1 137,4MB/s | 137,4MB/s
L2 60,8MB/s | 60,8MB/s
RAM 45,5MB | 45,5MB/s

##################################
TEST ->cachechk16
PROCESSOR ->am5x86@160MHzMHz

*12ns TAG* | *15ns TAG*
L1 164,8 MB/s | 164,8MB/s
L2 72,8 MB/s | 72,8MB/s
RAM 54,5 MB | 54,5MB/s

I haven't noted any stability issues during test. As you can see there are no adventages from using 12ns tag ram on this motherboard. Maybe problems would arise if cache chips were more overclocked but unfortunately 40MHz is the fastest available FSB on GA-5486AL.

Old Thrashbarg basically said it all 😉

Maybe the difference between 15/15 and 12/15 is sub-nanosecond, smaller than what cachechk can detect? Or maybe the test script is so small that it resides entirely in the L1 cache and on-chip registers? Try it with 12/12 TAG/Cache and see if the values change at all -- that may be the real test. I don't generally trust just one test program.

As you can see there are no adventages from using 12ns tag ram on this motherboard.

That's another thing... 12ns, 15ns, whatever, that's just the rating of the chip. Often they can be run faster, or with tighter timings, than the official specs would indicate. And since most motherboards will only allow so much adjustment of the timings, and only so much bus speed, it's not uncommon to run into cases where using faster SRAMs doesn't provide any functional benefit.

feipoa, If you have a Pentium 133 and a Pentium 100, and first benchmark the Pentium 100 @ 100Mhz, then run the Pentium 133 @ 100Mhz, they will run the exact same speed 😉

133 is just the maximum rated speed. Same thing with cache chips, it's their rated speed.