VOGONS


First post, by mpe

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I always wondered what is the root cause of EDO RAM incompatibility with many 486-era chipsets.

The trick of EDO RAM is that data remains available longer on the bus. Thus my thinking is it should be on the chipset whether to use that time to start the next read cycle or not. Thus EDO SIMMs should be transparent to old systems. Yet, many pre-EDO chipsets don't work at all with EDO SIMMs.

I noticed that some 486 and especially early Pentium chipsets don't support EDO (or at least don't declare support for it) and yet they work, or at least tolerate EDO SIMMs. Other refuse to boot.

Also is there a list of 486 chipsets which do support or tolerate EDO?

Blog|NexGen 586|S4

Reply 1 of 2, by Tiido

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Because the data remains on the bus longer it conflicts with the next cycle the CPU starts, causing bus contention and a quick crash. In worst case there will be actual physical damage. All pentium boards I know of have the DRAM databus behind special bus transceiver chips, removing this problem. Some 486 boards also have the data lines behind a buffer, letting EDO to be used. It isn't particularly a chipset thing but instead how the board handles the DRAM databus.

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Reply 2 of 2, by mpe

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Thanks. Now it makes sense. I had a suspicion that EDO RAM compatibility might be a board specific rather than chipset specific thing.

Blog|NexGen 586|S4