On Pentium Pro/II, where are the PDPTEs stored in SMM RAM?

https://www.sandpile.org/x86/smm.htm
only mentions for Pentium 4 and up?

I've currently just used the Pentium to use the P5 map(traditional Intel/AMD processor SMM state save map) and the P6 CPUs(Pentium Pro and Pentium II) to use the P6 column mapping in the same map.

Then, on the Pentium Pro and Pentium II I just added the PDPTR0-3 fields from the 7EC8-7EE8 SMRAM range. Although I can't find the true location of those fields on those processors? Anyone knows where Pentium Pro/II store those fields (P6 architecture)?