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Re: Pentium 66 MHz socket 4 system

regarding the fdiv bug. does it prevent anything "normal" from happening? cause any instability? if so, why use it? The FPU is less accurate. You get wrong results when you divide certain numbers. Won't affect stability, but it has historical significance - a sort of curiosity. Intel ran expensive …

Re: EDO vs. FPM on 430HX

Being in self-isolation I had some time for experiments. I've re-done EDO vs FPM benchmark on my 430HX board. The actual improvement of EDO is a little bit less than I remember it. More like +3% in Quake framerate. The +5% was in cache-less system where the difference in RAM latency is magnified. …

Re: EDO vs. FPM on 430HX

Yes 244 series is a 8 channel buffer. It has propagation delay between 2.5 - 7 ns and output enable time between 2 - 8 ns which increase effective RAM access time. I think the chipset could be trying to compensate for these delays by increasing the cycle time. These delays should apply to FPM too. …

Re: EDO vs. FPM on 430HX

I think you can take it as granted that this board with 8 SIMM slots must use buffered RAM signals to stay within specs. The string of small chips just under SIMM slots is #1 candidate for me (can't read markings). Whether this board also supports buffer bypass ( to enable x222 EDO timing for 2 or 4 …

Re: EDO vs. FPM on 430HX

The buffering doesn't have to be on module. It can also happen on the motherboard - look for 74FCT3245A devices or similar close to SIMMs slots. How many memory slots that can take double density modules are on your board? If more than 4 then there must be some buffering involved. The 430HX chipset …

Re: EDO vs. FPM on 430HX

OEM systems with dual CPUs are often a bit exotic. They are likely to be using more than 4 rows of RAM which require buffering. This means that both lead-off and burst rates are increased by one to account for buffer delay. This effectively eliminates aby benefits of EDO. Or they could be penalised …

Re: EDO vs. FPM on 430HX

I don't think you can drive FPM RAMs at x-2-2-2 at 66 MHz no matter if 60ns or 50ns. Unlike EDO the FPM cannot remove CAS during data transfer and thus it needs extra cycle and at best three cycles for burst transfer. The initial cycle is the same as in EDO. As I mentioned above the "x222 / x333" …

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