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Re: Finding bugs in the 80(1/2)86 emulator core?

I've just found a little bug in the checking of segment limits (It's Expand-Down/Up code to be exact). It was checking for bit 2 in the Access Rights byte to be cleared in order to check for Expand-Down segments(Which checks the same bit to be set). I've fixed this to first check bit 3 (bit value of …

Re: Finding bugs in the 80(1/2)86 emulator core?

OK, so there's a problem with the segment address of interrupt 21h. Yes, the Sound Blaster uses IRQ5, which I've set up in DOTT using Dosbox, since the settings menu crashes when saving the settings in UniPCemu. Before many of the fixes(mostly exception handlers blocking writes to and loads from …

Re: Finding bugs in the 80(1/2)86 emulator core?

I've just tried running Day of the Tentacle on my 80286 AT emulation. It eventually tries to handle a #GP, which points to a certain address. I see the prefetch being buffered with the following information directly following the interrupt Dh(#GP handler): 2e CS: 6f OUTSW [SI] Since SI contains …

ET4000 Windows 3.0 640x480x256 and 32k/64k modes failing(on 8086/8088 emulation) due to non-chain-4(ET3000) or various?

For some reason, the 640x480x256 mode of the ET4000 graphics card(which is just the VGA emulation with extensions for ET3000/ET4000 enabled at the precalcs) fails, resulting in a big reddish screen with a gigantic mouse cursor instead? The VGA modes and ET3K/ET4K 16-color modes work without problems …

Re: Is the 8088/86 pipelined?

What you've said is already implemented if you look at the code: - The CPU_databussize check ensures that all memory accesses(8-bit, 16-bit unaligned first part, 16-bit unaligned second part and 16-bit aligned whole) consume 5 cycles. - Otherwise, it will always take 5 cycles for each byte(or 2 …

Re: Is the 8088/86 pipelined?

This is what I get after adjusting the MMUR cycles to 5 each access(on top of the 10 or 8 cycles already mentioned, so 10+5/10 and 8+5/10 cycles). 8088MPH_RasterBars_5cyclesPerMemory.zip Edit: Reducing the 10 and 8 cycles with 5(which is included in the cycle count) improves performance again, with …

Re: 80286 CPU testing program?

The hard disk BIOS starts at that segment: The VGA BIOS is 24kB large, so 6000h bytes. Divided by 16 this results in 600h segements, thus with a base of C0000 this results in it ending at C5FFF, thus the hard disk BIOS starts at C6000(aligned to 2kB(800h).

Writing AVI files with audio in pure C?

I'm considering adding support for AVI file (video+audio at the specified aspect ratio currently used, after scaling to get a fixed resolution(800x600 for VGA, custom for CGA, 768p, 1080p; depending on the current aspect ratio. Of course screen changes will add increasing numbers to the new …

Re: Is the 8088/86 pipelined?

Reenigne, your last post makes me remember something: I currently have the IN and OUT instructions to use 10(opcodes E4/E5/E6/E7) and 8(opcodes EC/ED/EE/EF) cycles. Does that include the cycles spent on the bus(I/O operation itself)? So do I still need to add 4 or 8 memory(actually I/O) cycles …

Re: Finding bugs in the 80(1/2)86 emulator core?

I've implemented the logging of bogus memory (triggered by 5 ADD '0000h' instructions in currently executing memory(non-prefetched) at CS:(E)IP). Trying to run the SETTUP.COM from the AT Diagnotics Disk from MS-DOS 5.0a only logs the following information(I'm using revision 3 of the AT BIOS): …

Finding bugs in the 80(1/2)86 emulator core?

I've noticed that, when enabling the "Quit on #UD(undefined) instruction" and running various software on my 80286 core, I get #UD exceptions(actual 80286 opcodes that are officially(and unofficially too afaik, like the GRP5 /7 opcode) invalid). This seems to be because it's executing code in bogus …

Re: Implementing 80286 cycle timings in UniPCemu?

The current emulation emulates a pretty cycle-accurate 80286 at 8MHz(tested using the first revision 3 BIOS from minuszerodegrees). It uses 3 cycles each bus cycle. The BIOS seems to work without many problems(other than hardware problems being reported due to inaccurate hardware itself, such as …

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