Re: Is the 8088/86 pipelined?
Posted on 2016-11-10, 10:20
This is what I get after adjusting the MMUR cycles to 5 each access(on top of the 10 or 8 cycles already mentioned, so 10+5/10 and 8+5/10 cycles). 8088MPH_RasterBars_5cyclesPerMemory.zip Edit: Reducing the 10 and 8 cycles with 5(which is included in the cycle count) improves performance again, with …