Re: SY-5EMA+ writing cache becomes disabled
Posted on 2022-05-10, 17:26
Just a guess: As far as i remember the VIA MVP(3) chipsets needed 2MB of L2 cache to cache 512MB RAM. This is probably also the case when L2 cache acts as L3 cache under a K6+ CPU. In case there´s only 512K or 1MB L2 cache on your board (you didnt tell us so far) - depending on the Soyo BIOS, L2 …