Need help decoding a datasheet \ VOGONS

Need help decoding a datasheet

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First post, by enaiel

Posted on 2022-03-09, 22:00

enaiel Offline

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Not sure where to put this question, is there a sub-forum for DOS programming? I need help decoding the datasheet of the PLL ICS94211: https://www.renesas.com/us/en/document/dst/94211-datasheet

I wanted to do some programming in DOS for fun, so I thought why not try to program a utility to change the FSB on VIA chipsets (yes, I know, not the easiest thing to start with!). Elitist 440BX owners have RayeR's SMB utility. Us poor VIA chipset owners have nothing.

It's been very difficult going due to a combination of badly documented specifications along with badly implemented implementations. Not to mention, a lot of information simply lost to time. I finally managed to make some decent progress and was actually able to read a block of data from the PLL :

18 bytes read (hex): 02 7F EF BD F7 FF 06 3F

If I'm reading the datasheet correctly, byte 0 is the "Functionality and frequency select register", so it should be returning the current FSB from the table on page 5 of that datasheet. The PC's FSB is currently running at 100 MHz, so from that table, byte 0 should contain the following information:

1|Bit 7| 0 | FS3 - From table for 100 MHz FSB
2|Bit 6| 1 | FS2 - From table for 100 MHz FSB
3|Bit 5| 1 | FS1 - From table for 100 MHz FSB
4|Bit 4| 1 | FS0 - From table for 100 MHz FSB
5|Bit 3| 0 | 0- Frequency is selected by hardware select, latched inputs. 1- Frequency is selected by Bit 2,7:4 
6|Bit 2| 0 | From table for 100 MHz FSB
7|Bit 1| 1 | 0- Normal. 1- Spread spectrum enable ± 0.35% Center Spread 
8|Bit 0| 0 | 0- Running. 1- Tristate all outputs

But that gives me 0b01110010 or 0x72 and not 0x02. What am I doing wrong?

Last edited by enaiel on 2022-03-10, 03:40. Edited 1 time in total.

#1 VIA C3 Ezra-T 1.0GHz / MSI MS-6368 / Voodoo2+ViRGE GX / SBPro2+YMF744+AWE64+SC-7
#2 Pentium III-S Tualatin 1.40GHz / QDI A10T / Voodoo3 3000+GF4 Ti4200 / Audigy+AU8830+SC-50

Reply 1 of 8, by chiveicrook

Posted on 2022-03-09, 22:24

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Could it be that the board implements digital IO for selecting the fsb instead of choosing it via i2c?

Reply 2 of 8, by enaiel

Posted on 2022-03-09, 22:42

enaiel Offline

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chiveicrook wrote on 2022-03-09, 22:24:

Could it be that the board implements digital IO for selecting the fsb instead of choosing it via i2c?

Hmm, I hadn't even heard of digital IO before! But I highly doubt that my MS-6368 motherboard from 2003, manufactured by MSI, and using VIA chipsets, has anything as fancy named as digital IO in it.

The fact that I'm getting data back from the PLL over I2C tells me I am close.... just need someone to point me in the right direction for this last and final step!

#1 VIA C3 Ezra-T 1.0GHz / MSI MS-6368 / Voodoo2+ViRGE GX / SBPro2+YMF744+AWE64+SC-7
#2 Pentium III-S Tualatin 1.40GHz / QDI A10T / Voodoo3 3000+GF4 Ti4200 / Audigy+AU8830+SC-50

Reply 3 of 8, by snufkin

Posted on 2022-03-09, 22:53

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Can't tell from the datasheet, but maybe the frequency set by the power on latched inputs isn't shown in bits 7:4,2. So when bit 3 is set to '0' then the values you read for 7:4,2 don't tell you what the current frequency is. They just tell you what the frequency will be if you set bit 3 to '1'.

Reply 4 of 8, by EduBat

Posted on 2022-03-09, 23:05

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Not an expert in this but the way I read it , since bit 3 of byte 0 is 0 then the frequency was defined by the latches at power on. This will now depend on the motherboard design but it's also interesting to note that the ICS has internal pull ups and pull downs that would define FS0-1, FS1-1, FS2-1, FS3-0, which according to the table corresponds to 100.23MHz. Byte 0 does not necessarily have to have the values of the power up latches when you read it.

Reply 5 of 8, by enaiel

Posted on 2022-03-09, 23:15

enaiel Offline

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snufkin wrote on 2022-03-09, 22:53:

Can't tell from the datasheet, but maybe the frequency set by the power on latched inputs isn't shown in bits 7:4,2. So when bit 3 is set to '0' then the values you read for 7:4,2 don't tell you what the current frequency is. They just tell you what the frequency will be if you set bit 3 to '1'.

EduBat wrote on 2022-03-09, 23:05:

Not an expert in this but the way I read it , since bit 3 of byte 0 is 0 then the frequency was defined by the latches at power on. This will now depend on the motherboard design but it's also interesting to note that the ICS has internal pull ups and pull downs that would define FS0-1, FS1-1, FS2-1, FS3-0, which according to the table corresponds to 100.23MHz. Byte 0 does not necessarily have to have the values of the power up latches when you read it.

But then, how would I read the current FSB? Maybe it has to be enabled via the Output Control Registers (bytes 1-6) first...

#1 VIA C3 Ezra-T 1.0GHz / MSI MS-6368 / Voodoo2+ViRGE GX / SBPro2+YMF744+AWE64+SC-7
#2 Pentium III-S Tualatin 1.40GHz / QDI A10T / Voodoo3 3000+GF4 Ti4200 / Audigy+AU8830+SC-50

Reply 6 of 8, by EduBat

Posted on 2022-03-10, 00:29

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The datasheet shows that the values of the "latched FSx#" can be seen in bytes 1, 3 and 4.
Reading from your dump we have FS0# - 0, FS1# - 0, FS2# - 0, FS3# - 1 then note 2 on page 6 says "Latched Frequency Selects (FS#) will be inverted logic load of the input frequency select pin conditions" giving us FS3 - 0, FS2 - 1, FS1 -1, FS0 - 1 which is the 100.23MHz on the table.

Reply 7 of 8, by enaiel

Posted on 2022-03-10, 04:06

enaiel Offline

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EduBat wrote on 2022-03-10, 00:29:

The datasheet shows that the values of the "latched FSx#" can be seen in bytes 1, 3 and 4.
Reading from your dump we have FS0# - 0, FS1# - 0, FS2# - 0, FS3# - 1 then note 2 on page 6 says "Latched Frequency Selects (FS#) will be inverted logic load of the input frequency select pin conditions" giving us FS3 - 0, FS2 - 1, FS1 -1, FS0 - 1 which is the 100.23MHz on the table.

A good theory, so lets test it out. I can change the FSB in the BIOS, so let me set it to 103 MHz.

Here's the new register dump:

18 bytes read (hex): 4A 7F EF BD F7 FF 06 3F

Bytes 1-6 haven't changed at all, so I'm guessing those are power-up configuration values, not current values.
And byte 0 has changed to 0x4A or 0b01001010. So it has to be byte 0.

Wait, I think I understand what you're saying! Since 100 MHz was the power-up default FSB, bit 3 was 0 and the FSB bits in byte 0 were not set. To get the FSB I had to invert the latched FS# bits in bytes 1, 3 and 4.
But 103 MHz FSB had to be set by the BIOS, so bit 3 changed to 1, and the FSB bits in byte 0 are now set.

Wow, that was complicated! Thanks a ton for your help @EduBat! One PLL down! Unfortunately, every PLL I want to support needs their datasheet to be similarly decoded 🙁

#1 VIA C3 Ezra-T 1.0GHz / MSI MS-6368 / Voodoo2+ViRGE GX / SBPro2+YMF744+AWE64+SC-7
#2 Pentium III-S Tualatin 1.40GHz / QDI A10T / Voodoo3 3000+GF4 Ti4200 / Audigy+AU8830+SC-50

Reply 8 of 8, by enaiel

Posted on 2022-03-11, 23:10

enaiel Offline

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Woo Hoo! Managed to successfully change the FSB on the VIA based MSI MS-6368 motherboard in DOS using the utility I just wrote! Too bad the motherboard is only stable at +- 10 FSB MHz, but it actually works! Once more, huge thanks to @EduBat for all his help decoding the PLL datasheet .