Also this puzzles me, this setup in the attachment seems to work.

I see in the boot screen 256KB is detected, but there is a UMC 8Kx8 chip in place where a normal 32Kx8 would have been.
And in the place where Tag ram would have to be fitted in like the documentation says on the stason site there is a Winbond 32Kx8 fitted ?? strange.

My understanding is that the size of the cache tag determines how much DRAM can be cached. Usually in motherboard manuals it states the 8kx8 part is used for 64kb cache and 32kx8 is used for 256kb cache. However, I believe the cache size and tag density sizes have dedicated jumpers and can be set independently. So in theory it should be possible to cache 64MB of memory in 64kb of cache if you have a 32kx8 tag installed (though I suppose it would have a lower hit rate). I've never tested it myself, but I do have a 386SX motherboard with 32kb SRAM that can cache the entire 16MB memory range, even though you would think it should only be able to handle 8MB. I suppose this might also be somewhat dependent on chipset and board design.

That is indeed strange.
The fact that a 386sx can only handle 16mb might have something to do with that use of cache, so it can handle more ram with less tag ram.?
But then again, a 386 sx has probably only 16bit chunks for the chipset instead of a 32bit for a dx chipset. so the tag table would be needed even greater instead of caching 32bit adress.
So the 32KB might be caching 2K lines of 16 bits words instead of a dx what would do 1K lines of 32bit words in its cache so the tag would be bigger on a sx???.

Or the 386sx what internally still is a 32bit one, does 2 reads at one request from the memory 16bit seperated, and the cache is still build in 32bit chunks, in that way the tag should be equal because the chipset knows the next line would have to be adressed also to read the 2nd 16bit word to fill the 386 32bit requests. so this would save the tag space in the end.

I dunno.
I need someone l33t to explain this to me, how stuff works.

I don't know if this helps but here's I've got a couple of my 486 motherboards

It's a ASUS VL/I-486SVGOX4 REV 1.5 with 256KB CACHE MEMORY
From what I believe is the tag chip it's a W24257AK-15

Then four of the cache chips are W24512AK-15

My other motherboard a ASUS PVI-486SP3 REV 1.21 with 128KB CACHE MEMORY
Tag chip W24128AK-15
Then four of the cache chips are W24257AK-15

I made a video tutorial about cache chips on 386 and 486 boards a while ago: http://youtu.be/2VBkTNMGRMM

I just fill all 9 sockets with the same cache chip. This has worked for all of my motherboards.

The thing is my VI15G VLB DX2-66 runs like cr@p when 256KB cache is turned on, and i want to check if it has something to do with the tag and timings.
Even at relaxed timings the dual banked 256KB causes random memory corruption and lockups, but only when it is warmed up after a few minutes.
It gets unstable, i cleaned all the pins with alchol and a glass brush to polish the contacts and want to exchange the tag ram chip with a faster one.
But the only faster 12ns one i have found is is a 128kbit one 16Kx8 so i was wondering if i would not break anything if put in this lower capacity cache ram one on the board.
that some dual banks have a 128kbit and most 486 dual banked cache machines use 256Kbit cache chips got me thinking if it would be ok to exchange.

But maybe i will just put it in, the worst thing is instand memory corruption when i use the cache above a certain memory use yes??

I found out the tag ram needed change from 20ns to 15ns this helped.
All is ok now, i tried to run WT and WB, but WT gives the best memory performance compared to WB.
I dont know why WB is not fast, maybe it is caused by the SX807 internally using WT for its L1 and is not capable to support WB for the L2 cache.
Or is the L2 cache policy entirely controlled by the chipset, in that way the sis471 would suck ass in this board.
i thought sis was a fast chipset for vlb 486's
WB will cause a 80ns memory delay and WT only 40ns just like no cache installed or enabled would cause a 40ns acces time with cachechk4.

I have a 486 motherboard that has better performance with WT cache policy too. Writeback L2 isn't that important it seems, so I wouldn't worry about it much.