VOGONS


First post, by jbenam

User metadata
Rank Newbie
Rank
Newbie

Hi everyone,

I've got a GMB-486SG which is very dear to me - and I've put an Am5x86 X5 P75 on it. I've got the last revision of the board (v2.2, according to the sticker onboard) and the latest available BIOS around, which it seems is 01/10/95.

I'm not sure what is going wrong, but I have been able to get the L1 Cache Write Back mode only a few times. Everything works wonderfully with L1 WT.

I am looking at the latest manual available: http://minuszerodegrees.net/manuals/Gemlight/ … tion%206.03.pdf

I have spent the good part of today in trying to document the "CPU" jumpers. The manual just gives you a bunch of stuff without explaining what it does - something that I hate, since I can't tweak anything nor try to pinpoint the issue with the WB cache mode.

Here are my current findings:

JP21
Hardware trap, according to the SiS471 schematics. Not sure what this is about.

JP24
5-6 = 4x Multiplier
Open = 3x Multiplier

JP30
1-2 = L1 Write Back
2-3 = L1 Write Through
Open = L1 Write Through

JP35
Closed = 5v
Open = 3.3v

JP36
In 3.3 Mode:
1-2 = 3.3V
2-3 = 3.5
Open = 4V

Random stuff I've found out with a multimeter:
JP25
Pin 1 - JP31 Pin 3, JP13, Pin3
Pin 2 - W/R* Chipset

JP31
Pin 1 - JP10 Pin 1
Pin 2 - CACHE# CPU
Pin 3 - JP25 Pin 1

JP12
Pin 1 - HITM Chipset
Pin 2 - HITM CPU

JP13
Pin 2 - INV CPU
Pin 4 - INV CPU

JP15
Pin 3 - WB/WT# CPU

Funny thing is, I can pretty much leave out every jumper from the "left" CPU block and the system still boots and performs as if following the AMD X5 config in the manual. What is the purpose of these jumpers then? Maybe they just have "sane" defaults when Open?

Anyway, I know that the "right" block (JP34, JP6, JP10, JP11) has at least something to do with L2, since removing everything disables L2 completely.

Anyone else with any experience of the SiS 471 chipset can help me in decoding what all this stuff means? 😁

Thanks!

Last edited by jbenam on 2020-12-10, 23:14. Edited 3 times in total.

Reply 1 of 9, by TheMobRules

User metadata
Rank Oldbie
Rank
Oldbie

A while back I posted this guide with details on how the jumpers work for setting L1 WB, clock multiplier, voltage detection and other things an ASUS motherboard with the SiS471 chipset. My main references were the SiS471 datasheet (which I assume you already have) and a really comprehensive page by Jan Steunebrink.

With that info I poked around the board with my multimeter to determine how the jumpers were connected to the CPU and chipset. I suppose you could take a similar approach, using the manual as a hint of what each jumper block does.

Reply 2 of 9, by jbenam

User metadata
Rank Newbie
Rank
Newbie
TheMobRules wrote on 2020-12-08, 22:27:

A while back I posted this guide with details on how the jumpers work for setting L1 WB, clock multiplier, voltage detection and other things an ASUS motherboard with the SiS471 chipset. My main references were the SiS471 datasheet (which I assume you already have) and a really comprehensive page by Jan Steunebrink.

With that info I poked around the board with my multimeter to determine how the jumpers were connected to the CPU and chipset. I suppose you could take a similar approach, using the manual as a hint of what each jumper block does.

Thank you for your answer. Jan's website was especially informative.

I've followed accurately both your thread and Jan's website and by connecting everything as in your thread and as Jan's says it just stops booting MS-DOS. I had to hard-wire WB/WT# CPU to 3.3V, since I couldn't find anything else to connect it to.

Also pretty much no config on the manual uses what I've found, so they must've either been very drunk at the time or I am doing something wrong. The only config which kinda looks like my findings is the Cx486DX2-V80.

I've also tried retracing my steps in finding how I did get WB working a few times, but I can't seem to be able to reproduce it anymore.

I am at my wits end - I suspect I will have to raise the white flag soon and have to deal with having the L1 cache in WT mode.

Reply 3 of 9, by TheMobRules

User metadata
Rank Oldbie
Rank
Oldbie

Yeah, I gave up on trying to enable L1 WB for a DX4 CPU on my Gigabyte GA-486VS, despite confirming all the required connections. The L1 WB works fine for DX2 CPU with write-back support, but with the DX4 setting the WB/WT# jumper results in a black screen. So it seems that CPU requires something else to work that is not there, maybe at BIOS level.

Reply 4 of 9, by jbenam

User metadata
Rank Newbie
Rank
Newbie
TheMobRules wrote on 2020-12-11, 01:56:

Yeah, I gave up on trying to enable L1 WB for a DX4 CPU on my Gigabyte GA-486VS, despite confirming all the required connections. The L1 WB works fine for DX2 CPU with write-back support, but with the DX4 setting the WB/WT# jumper results in a black screen. So it seems that CPU requires something else to work that is not there, maybe at BIOS level.

The BIOS supports it - of that I am certain, as I did manage to get it to work for a while some days ago, and that is maddening to me. If I did get it to work, with this same CPU, why can't I get it to work anymore?

I was moving jumpers randomly, and something did it. Problem is, there are too many combinations to try, so I am trying to narrow it down a bit...

Reply 5 of 9, by jbenam

User metadata
Rank Newbie
Rank
Newbie

Anyway, I suspect it might be an issue with my specific motherboard. I fear some of the required connections might have stopped working (solder joints cracking?). Not even by using ctchip34 (which is amazing, by the way!) have I managed to get it working again in WB mode.

Also, since it hangs when setting every jumper correctly, I suspect that it's the right setting for WB, but it's just missing some signal.

I have since tested the X5 in another motherboard (Chaintech 486SPM) and it's working well in WB mode on that one. Since I have managed to reach a quite decent speed with L1 in WT, I guess I will just call it a day.

I might revisit this issue in the future (this time by using a soldering iron) if I were to remove the motherboard because of some other issue that is going to come up.

Reply 6 of 9, by TheMobRules

User metadata
Rank Oldbie
Rank
Oldbie

One detail from my other thread that may be of interest: at least on my ASUS board, setting the jumper that connects the CACHE# line of the CPU to pin 118 of the chipset causes it to hang when booting if using L1 WB. According to the chipset datasheet, pin 118 is supposed to work as CACHE# line when in WB mode, but for some reason I have to set the jumper so that pin 118 connects to a pull-up resistor instead. Jan's page also mentions this connection being optional for L1 WB, so you may try to play around with that connection if you haven't yet.

Reply 7 of 9, by jbenam

User metadata
Rank Newbie
Rank
Newbie
TheMobRules wrote on 2020-12-13, 00:24:

One detail from my other thread that may be of interest: at least on my ASUS board, setting the jumper that connects the CACHE# line of the CPU to pin 118 of the chipset causes it to hang when booting if using L1 WB. According to the chipset datasheet, pin 118 is supposed to work as CACHE# line when in WB mode, but for some reason I have to set the jumper so that pin 118 connects to a pull-up resistor instead. Jan's page also mentions this connection being optional for L1 WB, so you may try to play around with that connection if you haven't yet.

Yeah, it looks like JP31 Pin3 is pull-up resistor, still hangs. It's okay - win some, lose some. I still can run the board on pretty much everything else (timings, clocks) maxed out. Seems stable enough.

Reply 9 of 9, by jbenam

User metadata
Rank Newbie
Rank
Newbie
Deksor wrote on 2020-12-13, 18:19:

I'm very interested by this topic 😀

I have sold my motherboard to someone, but maybe you can help us improve this page with these infos ? http://www.win3x.org/uh19/motherboard/show/2600

I don't think I will be able to provide much more than what is provided in the initial post - they are also unconfirmed findings which I just made by probing randomly at stuff at night. I'm not sure it qualifies as reliable enough info to be added to UH19 🙁