Hezus wrote on 2021-08-23, 11:59:

Looking at the schematics there's another crystal running at 48 Mhz. The IC on U15 then divides this into 2 (24 MHz) on pin 62 t […]
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Looking at the schematics there's another crystal running at 48 Mhz. The IC on U15 then divides this into 2 (24 MHz) on pin 62 to the board somewhere. It then also feeds 24 MHz back to the CPU on pin 83. Divided by 3 this then gives me the 8 MHz it's currently running on.

Some questions on my mind:
- Am I correct that swapping the 48 MHz crystal for a 60 Mhz (60/2=30/3) would make the CPU run at 10 Mhz?
- Is the 14,318 cystal there for legacy reasons or some type of turbo/slowdown functionality?
- The 24 Mhz signal on pin 62: is it divided by 3 too at some point for the rest of the board's operation frequency (like ISA slots, etc)?
- Do IBM PS/2 components generally work on 10 Mhz ?
- Will the IBM PS/2 BIOS stop me from swapping out crystals?

If your system can handle the 25% overclock, the CPU will indeed run at 10MHz. It seems the PS/2 model 30 generates memory timings from the 48MHz clock, too, so the access speed of the onboard memory might limit your overclocking potential. You can desolder the onboard memory (it's just 128K) and use faster SIMMs in the sockets to get 512K of memory at any access time you like. The BIOS can handle missing onboard memory.

The 14.318 crystal is mainly for legacy reasons. The main timer clock, from which the memory refresh period, the DOS time of day and the PC speaker sound frequency is derived runs at 14.318 MHz/12. The 24MHz signal is used for the floppy controller. This means if you increase the 48MHz clock to 60MHz, the system reads/writes floppies at a higher data rate, too. This will not be compatible to anything. If you are serious about overclocking that machine, you need to inject proper 24MHz into that line, and disconnect the 24MHz output which will be at 30MHz. Also UART CLK is derived from the 48MHz signal (from dividing it by 26), so all serial baud rates will be off when you overclock the system. Again, you could disconnect the UART CLK output and inject a dedicated 1.8432 MHz clock into that line.

I don't remember whether the PS/2 BIOS has a timing consistency check, but it might be. The intention of those checks never was to "stop evil overclockers", but it was meant to detect defective clock generation circuits that run at an unexpected frequency unintentionally.

I dunno if this PS/2 has it, but my 55SX does, could only get a 2.3Mhz overclock from 16mhz before it would trip. So seems to be in the region of 15% deviation on that.

Edit: there also this kind of thing which might help keep timings straight https://github.com/reeshub/pc-sprint note that is an 8088 so things will be different. I believe there are some other vintage circuits around to clock double a V20 or V30 so you've got like an NEC DX2-10, while the PC/XT board stays at 4.77Mhz. Or you do both so you push the motherboard up to 6 or so then double to 12.

mkarcher wrote on 2021-08-23, 19:04:

If your system can handle the 25% overclock, the CPU will indeed run at 10MHz. It seems the PS/2 model 30 generates memory timings from the 48MHz clock, too, so the access speed of the onboard memory might limit your overclocking potential. You can desolder the onboard memory (it's just 128K) and use faster SIMMs in the sockets to get 512K of memory at any access time you like. The BIOS can handle missing onboard memory.

The 14.318 crystal is mainly for legacy reasons. The main timer clock, from which the memory refresh period, the DOS time of day and the PC speaker sound frequency is derived runs at 14.318 MHz/12. The 24MHz signal is used for the floppy controller. This means if you increase the 48MHz clock to 60MHz, the system reads/writes floppies at a higher data rate, too. This will not be compatible to anything. If you are serious about overclocking that machine, you need to inject proper 24MHz into that line, and disconnect the 24MHz output which will be at 30MHz. Also UART CLK is derived from the 48MHz signal (from dividing it by 26), so all serial baud rates will be off when you overclock the system. Again, you could disconnect the UART CLK output and inject a dedicated 1.8432 MHz clock into that line.

I don't remember whether the PS/2 BIOS has a timing consistency check, but it might be. The intention of those checks never was to "stop evil overclockers", but it was meant to detect defective clock generation circuits that run at an unexpected frequency unintentionally.

BitWrangler wrote on 2021-08-23, 19:21:

I dunno if this PS/2 has it, but my 55SX does, could only get a 2.3Mhz overclock from 16mhz before it would trip. So seems to be in the region of 15% deviation on that.

Edit: there also this kind of thing which might help keep timings straight https://github.com/reeshub/pc-sprint note that is an 8088 so things will be different. I believe there are some other vintage circuits around to clock double a V20 or V30 so you've got like an NEC DX2-10, while the PC/XT board stays at 4.77Mhz. Or you do both so you push the motherboard up to 6 or so then double to 12.

Thanks for the explanations, guys! As I feared there is way more to it than just replacing the crystals. Maybe there are more boards around like the PC-SPRINT but as the PS/2 has such a different approach to it, it'll be hard to find (if it exists at all). I guess I would have to design a daugtherboard to handle all those different clock speeds but by knowledge of electric circuitry is rather limited.