O.k., In the options for "error report mode" I selected "individual errors" first and in the next round "badram patterns".

Here are the results:

majestyk wrote on 2022-09-04, 17:16:

Here are the results:

Test 6 ("block move") is unable to detect precise locations of errors, but Test 4 ("moving inversion") is. All the errors you are getting at the moment relate to bit 0, so it seems like the chip that implements bit 0 is faulty. While test 6 is unable to detect precise locations, it still detects coarse locations, so you have at least two unstable bits, one around 95MB and another one around 222.5MB. As you see in your earlier experiments, you get the first error at ...a30 if the faulty SIMM is in slot 1, and at ...a34 if the faulty SIMM is in slot 2. That's because the 430HX chipset implements a 64-bit memory interface, and putting the SIMM into the other slot moves the problem to the other 32-bit half of the 64-bit word.

It seems that the location of the error is stable, which indicates an actual issue in the memory chip and not a soldering joint. As I don't know how the board is layed out, I can't say for sure that the pin called D0 is actually used implement bit 0 on the processor bus, but it is likely that it is.

Thanks a lot!

Assuming CPU-Bus HD0 translates to MD0 in the MCH I found that D0 is at pin 2 of the SIMM slots 1 and 3.

On the memory stick pin 2 is connected to memory chips #1 and #2.

I then ran a test while keeping chip #1 cold (with coolant spray) and no errors occured. So chip #1 got replaced first.
Both testing with parity disabled and testing with parity enabled and timing set to 60 nS resulted in 0 errors.

I´m happy my second quad-128MB RAM set is complete and 100% working again.
(I´ll let the test run for some hours now to make sure...)

Sweet!! Good job. Good idea modifying my heat idea to cold 🤣.

You don't have to solder out chips. First try to brush all ram area with pure alcohol with a used tooth brush. 72 pin contact pins are primarily important!