Well you are using a K6-3+ so the cacheable limit won't be of any concern as it is much higher than the board can support, same for any K6-2+ and original K6-3 due to the integrated L2 cache. You will also have a few extra options such as being able to change the multiplier with in dos along with the usual cache tricks to emulate 486 level performance without slowdown utility.

Right cacheable area should be no prob for CPUs with L2 cache, but what if I need to use other CPUs - like original Pentiums for compatibility reasons with certain applications? (Just a theoretical question, don't ask for any specific examples just yet. 😀)

most ali5 boards with 512k onboard cache can only cache 128mb of ram(except the late rev.G/H which can cache 512mb), but that should not have much effect on performance, because ali chipsets have very fast memory performance which is almost as fast as onboard cache, and thats why the later ali7 chipset(last chipset for socket7) didn't have any onboard cache at all.

[GPUT]Carsten wrote:

Right cacheable area should be no prob for CPUs with L2 cache, but what if I need to use other CPUs - like original Pentiums for compatibility reasons with certain applications? (Just a theoretical question, don't ask for any specific examples just yet. 😀)

For Dos you won't need much at all and will be well within the cacheable limits. The reason why people tend to favor using an 133mhz P1 ect and use the cache tricks is mainly due to compatibility as some of the classic isa cards tend to have issues with midi if the cpu is clocked to high. For Win9x a K6-3 is more than enough for most except for the later games that will need a P3. Anyway I am glad that I have so many socket 7 boards to last me for years.

Ok, so that sounds pretty encouraging. Thanks a lot guys and let the screwdriving commence. 😀