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First post, by feipoa

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There have been periodic requests for which CPU configuration registers to use for various CPUs and which programs are best suited to enable them. Below is a list of the programs and commands I use for various CPUs. If you know of other useful register settings with certain hardware combinations, please share your experience.

Cyrix 486SXL & DLC
I use a program from the SRC_MS folder by Paul Gortmaker called cyrix.exe. My settings are,

DOS
cyrix.exe -i1 -f
you may also need to set -m- if you experience periodic problems with your floppy drive.
some motherboards set L1 to disabled by default. In which case, you need to enable it with -e

You can use cyrix.exe -q to check the current status of the CPU.

For the SXL2, to enable clock doubling, cyrix.exe -cd
To go back to non-doubling mode, cyrix.exe -c

Note that the SXL and SXL2 CPUs always have their L1 cache scheme set to two-way set associative. Cyrix/TI 486DLC processors use the same registers that the SXL uses [for clock doubling], but for changing the L1 cache scheme.

For the DLC, to to set L1 in direct-mapped mode, cyrix.exe -cd
To go back to two-way set associative (the default), cyrix.exe -c

The options are:

Option			Action
------ ------
-a[-] Enable [disable] A20M input.
-b[-] Enable [disable] BARB input.
-c[d] Two way assoc. [direct-mapped] cache.
-d Raw dump of control registers and exit.
-e[-] Enable [disable] 1k cache via CR0.
-f[-] Enable [disable] FLUSH input.
-h Print this help screen and exit.
-i<n> Inhibit non-cachable region <n>, where n={1,2,3,4}.
-k[-] Enable [disable] KEN input.
-m[-] Enable [disable] cache of 1st 64k of each Mb.
-o Override check for existence of Cyrix DLC chip.
-p Disable all power saving modes.
-q Query DLC configuration status and exit.
-r[-] Disable [enable] cache of 640k -> 1M ROM shadow area.
-s[-] Enable [disable] SUSP i/o.
-v Print version number and exit.
-x<hex>,<size> Don't cache <size>kb from segment <hex>.

Windows
cyrix.exe -f -m- -xA000,128 -xC000,256
some MB's set Barb and Flush. If you are using Flush, do not set Barb. Deselect the Barb pin with -b-
some motherboards set L1 to disabled by default. In which case, you need to enable it with -e
I beleive -xA000,128 -xC000,256 is the same as using -r, however I use -xA000,128 -xC000,256 instead

The DLC/SXL chips have L1 cache enabled by default, however the whole 4 GB memory region is set as non-cacheable [by default], which doesn't allow for operation of the L1 internal cache. Use -i1 to inhibit region 1, thereby making this region cacheable. The use of -f enables the FLUSH pin on the CPU, which allows the L1 cache to be invalidated (cleared) when needed. There are various other settings which you might need to enable depending on your specific motherboard/chipset, such as A20M, BARB, KEN, NC0, NC1 and some hardware modifications to the FLUSH, A20M, ADS#, and LOCK# pins, if necessary. You can use cyrix.exe -q to display a list of what registers are currently set and cyrix.exe -h for a list of commands.

If you are using a DMA-capable SCSI controller, such as the Adaptec AHA-1540/1542, and the SXL, SXL2, or DRx2, you will need to use the BARB method to invalidate the cache, cyrix.exe -b . The necessity of -f or -b or neither depends on your motherboard, CPU, and SCSI card. Experimentation may be necessary. If using BARB, and your motherboard has enabled FLUSH, disable flush with cyrix.exe -f-

For a more complete example, I use the following configuration line in my autoexec.bat file when using an AMI Mark V Baby Screamer motherboard + SXL-40 + AHA-1540, cyrix.exe -e -b -m- -xA000,128 -xC000,256

IBM Blue Lightning BL3
For DOS, I use a utility from Evergreen Technologies called REVto486.exe. There is also a driver tool from Kingtston called lght486.exe, but I think it only goes up to a 2x multiplier. When using the Evergreen REVto486, add the following to your config.sys file

c:\REVto486.sys /BL /CN /CCM /3

/BL tells the software to setup the registers according to an IBM Blue Lightning CPU
/CN - unknown
/CCM makes the FPU faster.
/3 is for 3x, 2 for 2x, and 1 for 1x multiplier

Cyrix/IBM/SGS Thomson 5x86 [/size]
For DOS, I use a program by Peter N. Moss called 5x86 Register Bit Enabler, Version C2

UMC 8881F/8886BF-based motherboards
(note that LINBRST may need to be disabled on some older revisions of this chipset)

DOS (stepping 0, revision 5 CPUs)
5x86.exe /LSSER=off /FP_FAST=on /MEM_BYP=on /DTE_EN=on /BWRT=on /LINBRST=on /LOOP_EN=off /RSTK_EN=off /BTB_EN=on

DOS (stepping 1, revision 3 CPUs)
5x86.exe /LSSER=off /FP_FAST=on /MEM_BYP=on /DTE_EN=on /BWRT=off /LINBRST=on /LOOP_EN=off /RSTK_EN=off /BTB_EN=on
(S1R3 CPUs do not support BWRT.)

The easiest program to use to adjust the multiplier of the 5x86 is SetMul by G. Broers.

setmul.exe 1 ----> sets multiplier to 1x
setmul.exe 2 ----> sets multiplier to 2x
setmul.exe 3 ----> sets multiplier to 3x
setmul.exe 4 ----> sets multiplier to 4x
setmul.exe HSE ----> sets multiplier 0.5x

Note that a 4x-capable Cyrix 5x86 chip, when booted in 4x mode, can only switch between 1x, 2x, and 4x, not 3x; a 4x- or 3x-capable Cyrix 5x86 chip, when booted in 3x mode, can only switch between 3x and 1x; and a 3x-capable Cyrix 5x86 chip, when booted in 2x mode, can only switch between 2x and 1x.

Win9x (stepping 0, revision 5 CPUs)
5x86.exe /LSSER=off /FP_FAST=on /MEM_BYP=on /DTE_EN=on /BWRT=on /LINBRST=on /LOOP_EN=on /RSTK_EN=on /BTB_EN=off

Win9x (stepping 1, revision 3 CPUs)
5x86.exe /LSSER=off /FP_FAST=on /MEM_BYP=on /DTE_EN=on /BWRT=off /LINBRST=on /LOOP_EN=off /RSTK_EN=off /BTB_EN=on
(I discovered that my particular S1R3 chip, which is rated for 100 MHz, would not load Windows with BTB or RSTK enabled at 120 MHz. For such chips, you can use /LSSER=off /FP_FAST=on /MEM_BYP=on /DTE_EN=on /BWRT=off /LINBRST=on /LOOP_EN=on /RSTK_EN=off /BTB_EN=off. Other reports indicate that BTB will work in Windows at 120 MHz if LSSER=on.)

These settings assume that your motherboard has already set L1 in write-back mode (CR0: CD=0, NW=1, CCR2: USE_WBAK=1). To see a list of which registers are currently set, you can use the Evergreen DOS utility and type ET586.exe /s, or use CTCHIP34.exe cx586.

WinNT4 / W2K (stepping 0, revision 5 CPUs)
For NT4/W2K, I use the Evergreen 586 Driver Setup version 1.0, dated 5/06/96. This loads a driver, ET586NT.SYS, into your Control Panel/Devices folder, and is set to run at System bootup. The values this program requires are in decimal. The settings for NT4 are the same as for Win9x, except that the format is in 8-bit register HEX-to-DEC.

Cache Mode: Write Back Cache
Set Startup Type: Yes, attempt to setup
PCR0 = 5
CCR1 = 2
CCR2 = 214
CCR3 = 28
CCR4 = 56

WinNT4 / W2K (stepping 1, revision 3 CPUs)
PCR0 = 2
CCR1 = 2
CCR2 = 150
CCR3 = 28
CCR4 = 56

These values are stored in HKEY_LOCAL_MACHINE\SYSTEM\ControlSet001\Services\ET586NT\Parameters. Oddly enough, they are stored in HEX in the registry.

SiS 496/497-based motherboards

DOS (stepping 0, revision 5 CPUs)
5x86.exe /LSSER=off /FP_FAST=on /MEM_BYP=on /DTE_EN=on /BWRT=on /LINBRST=off /LOOP_EN=off /RSTK_EN=off /BTB_EN=on

DOS (stepping 1, revision 3 CPUs)
5x86.exe /LSSER=off /FP_FAST=on /MEM_BYP=on /DTE_EN=on /BWRT=off /LINBRST=off /LOOP_EN=off /RSTK_EN=off /BTB_EN=on

Win9x (stepping 0, revision 5 CPUs)
5x86.exe /LSSER=off /FP_FAST=on /MEM_BYP=on /DTE_EN=on /BWRT=on /LINBRST=off /LOOP_EN=on /RSTK_EN=on /BTB_EN=off

Win9x (stepping 1, revision 3 CPUs)
5x86.exe /LSSER=off /FP_FAST=on /MEM_BYP=on /DTE_EN=on /BWRT=off /LINBRST=off /LOOP_EN=off /RSTK_EN=off /BTB_EN=on

These settings assume that your motherboard has already set L1 in write-back mode (CR0: CD=0, NW=1, CCR2: USE_WBAK=1).

WinNT4 / W2K (stepping 0, revision 5 CPUs)
For NT4/W2K, I use the Evergreen 586 Driver Setup version 1.0, dated 5/06/96. This loads a driver, ET586NT.SYS, into your Control Panel/Devices folder, set to run at System bootup. The values this program requires are om decimal. The settings for NT4 are the same as for Win9x, except that the format is in 8-bit register HEX-to-DEC.

Cache Mode: Write Back Cache
Set Startup Type: Yes, attempt to setup
PCR0 = 5
CCR1 = 2
CCR2 = 214
CCR3 = 16
CCR4 = 56

WinNT4 / W2K (stepping 1, revision 3 CPUs)
PCR0 = 2
CCR1 = 2
CCR2 = 150
CCR3 = 16
CCR4 = 56


Cyrix MediaGXm

DOS & Win9x
I use a combination of programs to enable FP_FAST, RSTK_EN, and LOOP_EN. The first program was in a zip file called CyrixGo.zip. It contains set5x86.exe and free5x86.exe and mentions the author as AEB Software. First run set5x86.exe. It goes through a series of questions concerning which Cyrix 5x86 features you would like enabled. Answer the questions as follows: LSSER = No, LOOP_EN = Yes, BTB_EN = No, RSTK_EN = Yes, BWRT = Yes, WT1 = Yes, USE_WBAK = Yes, DTE_EN = Yes, MEM_BYP = Yes. Unfortunately, there is no FP_FAST option to enable with this program and the program also makes a mess of many other register settings. This program creates a configuration file, 5x86.cfg which is invoked by free5x86.exe.

Place free5x86.exe in autoexec.bat

We now must use 6x86ctl.exe by Ray Van Tassle to fix the mess that free5x86.exe made and to enable FP_FAST. Unfortunately, 6x86ctl.exe does not allow for setting LOOP_EN and RSTK_EN, which is why free5x86.exe was required.

Place the following commands in your autoexec.bat

6x86ctl.exe -n1 -b2
6x86ctl.exe -n2 -b80
6x86ctl.exe -n2 -b8
6x86ctl.exe -n3 -b4
6x86ctl.exe -n4 -b80
6x86ctl.exe -n4 -b20
<------------this particular line enables FP_FAST

It was quite a headache to figure all this out. Unfortuneately, free5x86.exe leaves the colour of your DOS font as a reddish pink. Add mode co80 to your autoexec.bat file to bring the colour back to system default. Thanks to Malvineous for this tip.

CTCHIP34 works with the MediaGX, however it does not get setup correctly when placed in the autoexec.bat file. The command, if you want to type it out in DOS is,

CTCHIP34 cx586 /20h:=%xxxxx1x1
20h refers to the HEX index for Performance Control Register [PCR0]
x = no change
1 = set high
xxxxx1x1 = set high the 0th and 2nd bit of this register (RSTK_EN and LOOP_EN, respectively)

CTCHIP34 cx586 /E8h:=%xx1xxxxx
E8h refers to the HEX index for Control Register 4 [CCR4]
x = no change
1 = set high
xx1xxxxx = set high the 5th bit of this register, which is FP_FAST.

For some reason, I get an error with this particular index, saying that E8H not found. You can manually go into CHCHIP's GUI to enable FP_FAST as follows,
CTCHIP34 cx586
Hit Page Down until you arrive at E8h
P
5=1
Hold down PG DN to exit.
EDIT: user jasa1063 says that to get E8h to work on the command line, it needs to be prefixed with a 0, so /0E8 instead of /E8. I haven't tested this.

Cyrix MII

DOS
I use a program called 6x86ctl by Ray Van Tassle and 6x86opt by Mikael Johansson.

6x86ctl.exe -f
What is this? A quote from the readme, "Branch Target Buffer is set to enable far change of flow (FAR_COF)".

6x86opt.exe -l
What is this? A quote from the readme, "Searches for a Linear Frame Buffer and tries to define an ARR/RCR for it allowing Write Gathering."

These are the only two register settings which had any measureable gain on my system. NO_LOCK and WT_ALLOC are enabled by default. If your board does not have write allocate enabled by default, you can use 6x86cfg.exe by Olivier Gilloire.

6x86cfg.exe -WA ------> Set this to enable write allocate

If your board do not have NO_LOCK enabled by default, you can use Fast'n'Slow, Fass.com, by Serge Ivanov

FASS.com /C ------> Set this to enable NO_LOCK

Win9x/NT4/W2K/XP

I use the Powerleap CPU Control Panel and set it to load at system boot. The settings I have with a check box are:
CPUID, Negate Lock#, Write Allocate, Use SMM, No Delay I/O Recovery, SUSP#, SUSPA#, Lower Power Suspend.
Caching regions A0000-BFFFF and Main memory set to W.G.

Cyrix 6x86

DOS & Win9x
I recall only NO_LOCK had any measureable performance gain.
FASS.com /C

My motherboard, a VIA MVP3-based board, has LINBRST set to 1 by default. I think many boards which support LINBRST should have it enabled, otherwise it is likely not supported. Intel 430TX boards do not support Cyrix's LINBRST feature.

VIA C3 Nehemiah

DOS & Win9x
I use Setmul by G. Broers to set the multiplier to 10.5x, allowing the CPU to run at 1.4 GHz.

setmul.exe 10.5

Setmul also contains other useful slow down features, like disabling cache and branch prediction.

NT4/W2K/XP
I use CrystalCPUID v4.15.5.452 to set the multiplier. This program has a startup program option which puts a link into your startup folder. Mine looks like this,
CrystalCPUID.lnk with target: "C:\CrystalCPUID.exe" /F20 /P1 /E

AMD K6
The BIOS in my 430TX board was modified by Jan Steunebrink to support Write Allocate. If you have a modified BIOS from J. Steunebrink, the System, and sometimes Video, BIOSes must be set to non-cacheable. For software enabling, you can try,

Fass.com /a

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    Attached here are the programs used in the above examples to set various CPU registers.
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Last edited by feipoa on 2021-03-09, 06:48. Edited 25 times in total.

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Reply 1 of 13, by carlostex

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feipoa wrote:
AMD K6 The BIOS in my 430TX board was modified by Jan Steunebrink to support Write Allocate. If you have a modified BIOS from J […]
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AMD K6
The BIOS in my 430TX board was modified by Jan Steunebrink to support Write Allocate. If you have a modified BIOS from J. Steunebrink, the System, and sometimes Video, BIOSes must be set to non-cacheable. For software enabling, you can try,

Fass.com /a

This is indeed due to the Intel TX chipset. On boards based with this chipset i was told by Jan that Video and System should always be set to non-cacheable.

Reply 2 of 13, by BSA Starfire

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Great & informative post, thanks for sharing.

286 20MHz,1MB RAM,Trident 8900B 1MB, Conner CFA-170A.SB 1350B
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Cyrix MII 333,128MB,SiS 6326 H0 rev,ESS 1869,Win ME

Reply 4 of 13, by feipoa

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Really glad to see someone else using a Cyrix MediaGX board! I predict these will become rare and collectible in the future as they were so obscure. It was a real pain to figure out those optimal MediaGX register settings.

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Reply 5 of 13, by elianda

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Great information.
Could you give a single archive with all the tool programs you used?

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Reply 6 of 13, by feipoa

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I updated the original post with a single .rar file containing the programs. I also added more information to the Cyrix 486SXL section.

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Reply 7 of 13, by alvaro84

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I necropost the thread to thank you feipoa for figuring out these settings. And report that my Quake timedemo went up from 19.3 to 20.6 fps with your guidance. I don't even know what clock it's running at, though. It's a BGA 180MHz piece but BIOS insists the board drives it at 200MHz. And every diagnostic software says something different, ranging from 50 to 150... Is there a definitive program to report it correctly?

Shame on us, doomed from the start
May God have mercy on our dirty little hearts

Reply 8 of 13, by jasa1063

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After doing some testing with CTCHIP34 I am able to set via the command line on my Cyrix MediaGX. You have to specify a value in hex for it to work. Run CTCHIP34 with the specified register to see the current values. Figure out what bit values to change and then come up with the required hex value for example:

CTCHIP34 cx586 /20:=5

Register E8 can be configured by prefixing it with a zero on the command line, so use /0E8 instead of /E8.

Reply 9 of 13, by feipoa

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jasa1063 wrote on 2021-03-09, 04:43:

After doing some testing with CTCHIP34 I am able to set via the command line on my Cyrix MediaGX. You have to specify a value in hex for it to work. Run CTCHIP34 with the specified register to see the current values. Figure out what bit values to change and then come up with the required hex value for example:

CTCHIP34 cx586 /20:=5

Register E8 can be configured by prefixing it with a zero on the command line, so use /0E8 instead of /E8.

The register needs to be hex, but the value doesn't need to be. Did you follow my instructions for CTCHIP34 for the MediaGX? I've added your comment about the 0-prefixing. Were you able to get ctchip34 to work in autoexec.bat? I had trouble with that.

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Reply 10 of 13, by jasa1063

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feipoa wrote on 2021-03-09, 06:51:
jasa1063 wrote on 2021-03-09, 04:43:

After doing some testing with CTCHIP34 I am able to set via the command line on my Cyrix MediaGX. You have to specify a value in hex for it to work. Run CTCHIP34 with the specified register to see the current values. Figure out what bit values to change and then come up with the required hex value for example:

CTCHIP34 cx586 /20:=5

Register E8 can be configured by prefixing it with a zero on the command line, so use /0E8 instead of /E8.

The register needs to be hex, but the value doesn't need to be. Did you follow my instructions for CTCHIP34 for the MediaGX? I've added your comment about the 0-prefixing. Were you able to get ctchip34 to work in autoexec.bat? I had trouble with that.

Yes, I did follow your instructions. It appears that the default values on a command line are assumed to be hex according to the documentation for CTCHIP34. It also mentioned about prefixing the 0 to values starting with "A" and above. Everything is working while setting via my autoexec.bat and is running much faster now. Speedsys peformance index went from 150 to 179!

Reply 11 of 13, by jasa1063

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I just wanted to mention since getting CTCHIP34 working in my AUTOEXEC.BAT, I decided to try and enable Branch Prediction on my MediaGX. With all options now enabled, I have had no stability issues in DOS or Windows. Now my CPU is branded as a Geode from National Semiconductor. I don't know if these newer revisions of the MediaGX fixed the Branch Prediction or not. I was also able to overclock the CPU to 300Mhz going from 266Mhz.

Reply 12 of 13, by feipoa

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That is good to know that you've found a working autoexec.bat method for ctchip34. Maybe I don't need to use my messy means with 3 utilities to set the registers anymore.

How much performance gain did branch prediction offer? Were you able to quantify this?

I found clocking to 300 MHz a challenge, especially if you want to use the fastest memory timings. I had to limit my system to 64 MB of RAM. Which motherboard are you using and how much RAM?

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Reply 13 of 13, by jasa1063

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I have an ECS P5GX-M motherboard with a Geode GXm-266P CPU overclocked to 300Mhz. It has 256MB (2x128MB) of PC100 SDRAM set to CPU clock divided by 4 with CAS 2. I am using an ET6000 video card with 4MB of MDRAM. Trying to run the memory with a divider of 3 was a no go. Here are some Speedsys results from various registers settings. The Speedsys performance index increased from 174.25 from 179.82 with branch prediction enabled. I am running CTCHIP34 in my AUTOEXEC.BAT with the follow values:

CTCHIP34 cx586 /20:=7
CTCHIP34 cx586 /0e8:=0f8

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