Aren't 30 pin SIMMs typically supposed to be installed in contiguous slots (unless your board manual says otherwise)? They work in sets of 4 in a 486 board, so that would mean 4 SIMMs in the first 4 slots .

Yeah, those SIMMs need to be in groups of 4. There's no dual-channel stuff in these boards like you see on modern things 🤣.

The 486 uses a 32 bit bus, 30 pin simms are 8 bit so you need 4 of them to form 32bits, same with 386DX (whereas on a 286/386SX you only need two).

The same happens with pentiums and 72 pin simms : 72 pin simms are 32 bit simms, but the pentium has a 64bit bus so you need two of them.

Yes ! You guys are Awesome !
It works now.
The manual read I had to have one sim in each memory bank.
And there are 2 banks of 4 slots.
So I thought, 1 sim in bank 0 and 1 sim in bank 1.
But that obviously did not work.
Putting all the sims in bank 0 worked.
I have the 486dx-66 installed.
I am going to regression test and benchmark this motherboard setup before I but in in a case.

Thanks peoples.

Okay, now that I have the motherboard working. What are the best bios settings for this setup ?
Bus Clk/Wait states ?
DRAM wait ?

What Oscillator do you have installed? How many MHz?

I'm a bit confused with your CLK2/4. It looks like you've overclocked the ISA bus to 16.66 MHz. CLK/4 should be better.

I have a 66.6mhz and a 14.3mhz.
I don't know what they do ?
See photo up top.

CLK2 is probably the name of the frequency source, it's not "clock*2" 33/4 = 8.25 which seems normal

4.98 is very very bad for a DX2-66, it's the level of a 386DX 25 roughly. A DX2 should perform near 24-25 points. Make sure turbo is set properly (maybe it needs to be closed to let the CPU run at native speed)

Okay, I am going to put this build on hold because the Dallas battery is dead and I will need to perform a coin battery adapter mod. I don’t have the parts right now.

Tiido wrote:

Yeah, those SIMMs need to be in groups of 4. There's no dual-channel stuff in these boards like you see on modern things 🤣.

They didn't have "dual channel", but some of the better boards supported something called "bank interleave", which I believe is a similar idea.
There was 2-way and 4-way interleave. I don't think the chipset on this board supports it though.