Update of what I've found so you don't think I'm using vogons to do my research for me.

The closest thing I could find for what the signal should look like is this doc:

http://www.ee.nmt.edu/~rison/ee352_spr12/PC104timing.pdf

However, this is talking about ISA bus timings, so I don't know if this would be the same in the context of pin 28 of the IDE connector. I apologize if the answer is in front of my face, my electronics knowledge is mainly analog with a superficial understanding of digital circuits.

I found some jumper settings for some old motherboards that suggest that BALE on pin 28 of the IDE connector was some optional feature on early IDE controllers:

https://stason.org/TULARC/pc/motherboards/F/F … EO-486-GAV.html
https://stason.org/TULARC/pc/motherboards/F/F … 486-VIP-IO.html

My controller is ATA-2 from what I can tell. I can't find any mention of BALE in any of the ATA specs and I can't find any IDE devices that require it. I'm still wondering what the signal is there for and what it should look like.

On the ISA slot BALE is supposed to signal when the address becomes valid. On the IDE port it seems redundant since every I/O cycle will involve an IOR or IOW command and the address is certain to be valid already when that happens anyway. But if you are testing with a scope it looks like BALE should remain low most of the time with only a pulse preceding each read or write.

Thanks! That's super helpful info. That gives me some ideas for how to test it. The signal isn't used by any of my drives, but I bet there's some chatter during startup.

Most of my searches have been turning up unrelated nonsense, so I tried looking up ISA pinouts and discovered that BALE also goes by ALE, which seems obvious now. This lead me to this:
https://old.pinouts.ru/HD/IdeInternal_pinout.shtml

It looks like this signal was part of the original IDE standard (before ATA). It must be on my board for compatibility. I'll see if I can find the original IDE spec sheet and see if it has any more detail. Hopefully, I didn't blow any components and I can focus on getting a slimline CD drive working with it.

All the boards I have don't connect that pin or connect it to ground, there probably isn't much of anything out there that absolutely needs this signal to be connected to BALE. A CD drive will not care at all about this signal nor do any HDD that I know of.

So I made some measurements not knowing exactly what to look for. I found no waveforms during boot or operation of the drives. I saw no strange voltages between logic states, noise, etc. Just in case I was missing it, I rebooted several times with various one-shot trigger settings and still found nothing. Resistance to ground and power rails both look like an open circuit. The results are inconclusive. I can't tell if the circuit is blown, BALE/ALE/DALE doesn't exist on this board, or I'm not measuring properly.

Considering that I have not run into any new issues and the signal isn't part of any version of the ATA standard, I guess it's probably nothing to worry about. It would make sense for it to be missing. This wouldn't be the first time that I find an error in Advantech's documentation; the manual says it's ATA-2, but it has no DMA and the pinout matches the old pre ATA IDE standard. ¯\_(ツ)_/¯

Tiido, in your kickass sound card thread, you said the IDE port is a dumb port without buffers. I've read elsewhere that it's essentially an ISA slot in disguise. Ideally, I would like a secondary IDE channel for the cd-rom. Would building an IDE port for the available PC-104 connector be relatively simple? I'm not asking you to make it or design it for me. I am comfortable with prototyping and learning on my own, but I'm not sure where to start. Are there any schematics or documents that can point me in the right direction?

Thanks!

You need to implement two address decoders for the two access strobes (!CE0 and CE1) on IDE connector, one for $1F0...$1F7(!CE0)+$3F6(!CE1) for primary and $170...$177+$376 for secondary. You can look at schemantics of stuff like Snark Barker and Adlib clones to see how one is made.

Thanks for the help! I'll check it out.