I agree it may be cache flush signal. The FPGA decode bus DMA cycles and generate it. But is there any reason why it even shouldn't POST with this flush signal unconnected? I also think that 386SX should work on the module if other pins are same. Voltages as I told before are all 5V here, no regulator used. The upgrade module might be placed in socket in wrong orientation and get damaged, I don't know what anybody did with it before I got it. Currently I don't have any other SLC CPU or 386SX board for more further testing. I would also need to test the FPU in different MB or borrow 387SX to test if my MB handles it well, it behaved weird...

At this point without a POST card and a scope there isn't much else you can do. See if the POST card has any codes on it, and if not start poking with the scope. First the basics, is the clock present on the CPU, the reset, are any of the address lines toggling, then data lines. See if the BIOS chip is getting chip select asserted. The usual works - there has to be a fault somewhere.

Oh and remove the co-processor in case there is something the Intel chip doesn't like about it. Last time I had issues like that (which was eventually traced down to cracked via that delivered reset signal to ISA slots) I even got a FLASH to EPROM emulating chip (so I didn't have to UV erase an actual EPROM all the time) and tried my own code in there. It's really easy to build a simple debugging tool that way with a POST card, one OUT instruction and you have 00-FF on the display. But that's assuming all data lines and most addresss ones work.

I have a POST card (even I had built one myself many years ago) but it didn't received any code in both cases (i386SX on upgrade module and IBM 386SLC on 386SX MB). Of course I tried to remove FPU from module socket and I tried to test it in 386SX MB, as I posted before it was recognized by Norton Diag. but all FPU tests failed and DosNav was freezing at startup so I have suspection it is also damaged some way but I never had other FPU in this 386SX MB so I'm not 100% sure if there is not some other problem like connections around socket, chipset, etc...
With scope I only checked that onboard 50MHz oscillator is working, feeding the CPU. I randomly tap some CPU and FPGA pins but there was not any visible traffic, just still levels...

RayeR wrote on 2021-04-14, 15:34:

With scope I only checked that onboard 50MHz oscillator is working, feeding the CPU. I randomly tap some CPU and FPGA pins but there was not any visible traffic, just still levels...

Get a 386SX pinout (Intel 386SX datasheet is a good source) and check:
- RESET (pin 33) should be low
- FLT# (pin 28) should be high
- CLK2 (pin 15) should have 50MHz clock
- HOLD (pin 4) should not be permanently stuck high
- READY# (pin 7) should be low, mostly, might have high pulses
- LOCK# (pin 26) should not be permanently low
- NMI (pin 38) should not be permanently high (in fact it should be low most of the time)
- INTR (pin 40) should not be permanently high (but CPU will start to boot as interrupts are masked on reset)

Also BUSY# (pin 34) should not be permanently low - not sure now if this is tested by CPU on reset or not, usually it's only important for x87 link and startup code should not touch the NPU.

Hi guys,

I’ve been reading through this thread and surprisingly it’s one of the few that discuss the 386 SX.

I have an old Toshiba T3100sx laptop that I have successfully upgraded from an Intel 386sx-16 to a Ti486SLC/E - 33 by desoldering off the old CPU and soldering on a new one, but I am wondering what would be the most high performance 386sx CPU that would work in place of the old 386sx?

For example it seems that the IBM 386SLC seems not quite compatible because of its cache and others because of voltage etc.

Also I want to rule out any upgrade cards as there is no clearance for that in my old laptop.

Any ideas?

Despite the extra cache control lines, a number of people on VOGONs have had some luck with 386DX systems and the IBM 486DLC3 (the 32-bit version of the SLC2).
I'm not sure why this works exactly. Perhaps the boards are new enough to have already built in some support.
Desoldering a 386SX and replacing it with another CPU is a gamble. Especially on a late 80s design, there is a chance the replacement CPU may not function correctly, and you will eventually tear the pads on your board if you mess with them enough.
That being said, you successfully swapped a 486SLC, so that's good. I assume it's still running at 16MHz?
In the Cyrix SLC family, the fastest chip is the TI SXLC2-66. The -66 is a rare part. The -50 is much more common. Both of them are 3.3V, but seem to work at 5V with proper cooling. There is also a SXLC-40 which is officially a 5V part, and supports clock doubling. These all have 8kb internal cache. Despite being very similar to the SLC, they seem to be a little less compatible with older systems.
The IBM SLC2 was made as -50 and -66. I've seen an article in an old PC World that claimed there was also an SLC3 at 75 and 100MHz, but I don't think they were ever released.
The IBM BL3/DLC3 can work in 16-bit mode, and was used in some 386SX upgrade modules, but they CPU itself has 132 pins, and pads on your laptop are 100 pins, so that won't work for you.

I successfully replaced a 386SX-20 with a TI486SXLC2-50-G on a IBM/PŜ1 2121 model several years ago (I used an empty EEPROM socket to plug a breadboard with the power regulator). With a 33 MHz crystal the 486SXLC2 works great at 66 MHz and the 8 kb cache makes a great difference when enabled. Only issue is the floppy drive, it doesn't read floppy disks when cache is enabled (DMA and no cache flush is a know source of issues). The chip doesn't even get hot running at 3.3v and a bit overclocked.

furan wrote on 2020-01-18, 20:51:

Some more: https://groups.google.com/d/msg/comp.sys.ibm. … ag/clWUxJ6tiDIJ […]
Show full quote

Some more:
https://groups.google.com/d/msg/comp.sys.ibm. … ag/clWUxJ6tiDIJ

IBM 386SLC: 386SX pinout with addition of some pins for cache control &
suspend mode. 24-bit Address bus, 16-bit external Data bus. 8Kb internal L1
cache. Able to run all Intel 486SX instructions. Model-Specific Registers
(MSR) to control CPU function. Low-power design. No internal clock
multiplying. Usually clocked at 20MHz to directly replace a 386SX. CPUID
A301h ('A' is IBM, '3' is CPU Family, '0' is clock multiplying, '1' is mask
revision).

IBM 486SLC2: 386SX pinout with addition of some pins for cache control &
suspend mode. 24-bit Address bus, 16-bit external Data bus. 16Kb internal L1
cache. Able to run all Intel 486SX instructions. Additional Model-Specific
Registers bits to control more CPU functions than the 386SLC. Low-power
design. Internal clock doubling at 40 or 50MHz. CPUID A421h or A422h.

IBM 486SLC3/486DLC2: PQFP 386DX pinout with addition of some pins for
cache control, suspend mode, & CPU bus width modes. Hardware pin switchable
between 24-bit Address bus/16-bit external Data bus or 32-bit Address/Data
bus. 16Kb internal L1 cache. Able to run all Intel 486SX instructions.
Additional Model-Specific Register from the 486SLC2. Low-power design.
Internal clock tripling at 60, 75, or 100MHz. CPUID A439h in 486SLC3 mode.

I just stumbled on this older thread - I was surprised to be quoted (I didn't have a VOGONS account back then) - I've also communicated with Frank van Gilluwe (author of the "Undocumented PC" that you have images from - It might be interesting where he sourced the information). Now to follow through to the end of the thread.