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512MB Memory Support on my new old Octek Hippo 15 Rev 1.23 486 Mainboard

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First post, by alexthekid

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Hi everyone. I am new to this forum and this is my first post... but I've been reading through this helpful forum as a guest quite a lot 😀.
Recently I started a 486-build. My attempt is to build an uprgaded-to-the max-out-of-this-world-but-still-reasonably-priced-486 😁.

I bought a reasonably priced 486-Mainboard. The Octec Hippo 15 Rev 1.23. It is working fine with an AMD 5x86-CPU @ 160 Mhz and 512KB Cache on the Mainboard in WB-mode.
The BIOS identifies itself as an AWARD MODULAR BIOS v4.50G and the currently flashed BIOS Version is Hippo 15 095040 Oct27,95. (I assume "095" is the year and "040" is the 40th release in that year.)
I coud find a copy of the manual and some BIOS update files and other misc tools here: https://www.elhvb.com/mobokive/archive/octek/ … 2015/index.html.

The board has four 72-pin PS/2 RAM-sockets, organized in two banks (or rather groups - but I will use "banks") and the manual specifies a maximum of 256MB RAM using four 64MB Modules and also specifies that the largest supported module size is 64MB.

I have tested the Board with 128 MB FPM-RAM-60ns-Modules, trying to get a total of 512 MB RAM.

The good news is: the 128MB modules are working in this board contrary to the specification in the manual . The bad news is: It seems that each bank supports a maximum of 128MB RAM.
To verfy this I have tested each RAM module -they are all fine - followed by each thinkable memory configuration with 1-4 modules on 4 slots
Here is a short table :

table01.png
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CC-BY-4.0

It seems that I cannot get more than 256MB in any possible memory configuration.

I am hoping to get support for 512MB with a newer BIOS.
I am not planning to run DOS .The OSes I want to use will be happy with more than 256MB RAM 😉...
Here is my first question: Does that even make sense or is there any reason to abandon ship right here at this point (in terms of of hard hardware limitations)?

In case that upgrading the BIOS might be worth a shot:
As mentioned above I found some newer bios update files under: https://www.elhvb.com/mobokive/archive/octek/ … 2015/index.html.
They are all from 1996 - newer than my current BIOS.

Unfortunately there is no revision history or any other comment on these files.
I am scared of bricking my working board by flashing an undocumented BIOS file.
I was thinking of creating a backup of the old bios before testing but I dont know how AWARD bios recovery works in case anything goes wrong. Also I lack the equipment to create a hardware copy of my ROMS before testing newer BIOSes.
My second question: Any recommendations on safely testing newer BIOSes and the AWARD recovery mode?

Now I have heard, that there is a thing called MRBIOS. The website went offline years ago and it is nearly impossible to recover a MRBIOS-BIOS for my Board.
My third question: Can anybody provide an original Octeck-BIOS (all versions welcome, preferably with revision history 😉) and/or a MRBIOS-BIOS-file for my Board?

4th question: Is there a 486 Mainboard known to support 512MB RAM or tested and working with 512MB contrary to its spec?

Thank you for reading 😀.

Reply 1 of 13, by Doornkaat

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Purely based on assumption I would suggest this is not a BIOS limitation but rather due to chipset limitations or PCB layout.

I'd recommend getting another compatible EEPROM and (hot)flashing the new BIOS versions to that. This way you can't lose your original working BIOS.

Reply 3 of 13, by Doornkaat

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You don't need a flasher if you don't mind trying a hot flash. You can even use another board with compatible EEPROM socket for hot flashing if you have one. That's how I get scrap boards with the EEPROM removed working.

Reply 5 of 13, by Doornkaat

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Btw. since you capitalise some nouns I will assume you're from Germany. If that's correct I could try and see if I can find a compatible EEPROM in my stash, flash an image onto it and send it to you.
I could also send it to abroad but shipping costs will probably make this unfeasible.

Edit: Seems like I'm too late regardless. 😉

Reply 7 of 13, by Doornkaat

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alexthekid wrote on 2020-09-23, 14:16:

You are right. I am from Germany... Was it that obious 😁?

EDIT: Thank you for your offer. Can we try this in case my method is not successful? Off course I would pay for ROM & shipping.

Yes, the offer stands regardless. I have a bunch of EEPROMS that will probably never see any use and unless you'd want tracked shipping I don't think we'd have to worry about that either.

Reply 9 of 13, by Disruptor

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It is a limitation to the UMC chipset.
However, you need 1 MiB L2 cache to cache all of the memory (in write through mode).
Your board does not support 1 MiB of L2 cache.

When your operating system allocates RAM from top to bottom (like Windows 2000) you will notice a huge performance drop with that much memory.

With 512 KiB of L2 cache you can:
64 MiB RAM --> fully cacheable in both write through and write back
128 MiB RAM --> fully cacheable in write through only

The summit of 486 motherboards may use 1 MiB of L2 cache and have a PS/2 mouse connector.
However, I've noticed that UMC based 486 motherboards do have problems with DMA controllers and L2 cache in write back mode...

Reply 10 of 13, by alexthekid

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Disruptor wrote on 2020-09-24, 01:04:
It is a limitation to the UMC chipset. However, you need 1 MiB L2 cache to cache all of the memory (in write through mode). Your […]
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It is a limitation to the UMC chipset.
However, you need 1 MiB L2 cache to cache all of the memory (in write through mode).
Your board does not support 1 MiB of L2 cache.

When your operating system allocates RAM from top to bottom (like Windows 2000) you will notice a huge performance drop with that much memory.

With 512 KiB of L2 cache you can:
64 MiB RAM --> fully cacheable in both write through and write back
128 MiB RAM --> fully cacheable in write through only

The summit of 486 motherboards may use 1 MiB of L2 cache and have a PS/2 mouse connector.
However, I've noticed that UMC based 486 motherboards do have problems with DMA controllers and L2 cache in write back mode...

Thank you for your reply. Is the amount of cache vs cachable memory based on tests? Can I find some documentation about this? If your information on L2-Cache vs cachable memory is correct then I would be able to see this performance drop already with the 256 MB that I have now. I will run some tests to see the impact on memory performance beyond the cachable area. (unless somebody here has already done that 😁)

What kind of problems did you notice (regarding UMC 486 motherboards , DMA controllers and L2 cache in write back mode)?

Reply 12 of 13, by alexthekid

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Disruptor wrote on 2020-09-24, 08:55:

I've made some tests here: My 486 UMC8886/8881 Project (Version 2.0)
I had read failures with any DMA based controller (SCSI, UDMA-IDE)

Thank you. Very interesting. It must have been a lot of work to test all this.

Edit: Btw... Since my Hippo 15 manual is very sparse I dug through some other 486 mainboard manuals to find some documentation for the cache vs cacheable memory size on UMC Chipsets.
I found something in this Shuttle HOT-433-Manual: https://ibm.retropc.se/manuals/Shuttle/Shuttl … %20HOT-433P.pdf
They specified the cacheable memory range on page 21 and 22.

128KB Cache -> 32MB WT / 16 MB WB
256KB Cache-> 64MB WT / 32 MB WB
512KB Cache-> 128MB WT / 64 MB WB (...just as you wrote earlier 😉)
1024KB Cache-> 256MB WT / 128MB WB

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