mkarcher wrote on 2021-07-27, 16:48:

In such cases, I usually scratch the solder mask from the copper traces on both sides of the break, and solder a thin strand of copper wire over the break, and fix/isolate the bodge with nail polish.

The via on the break itself is also damaged - if I probe it from both of it's sides, I get open so the top side of that is no use. Shortest fix I think will be on the bottom side of that trace (pictured below). I've got some 26 AWG bodge wire, do you think I could remove the solder mask on those vias (lacquer thinner?) tin the wire, solder it into the via cup and adhere it down? Those traces are tiny in real life!

FK

mkarcher wrote on 2021-07-27, 16:16:

FrankieKat wrote on 2021-07-27, 12:45:

No luck finding a datasheet online yet. Does anyone have a good source for datasheets for these (CHIPS F82C351 B-1, F82C355 A, F82C356)?

The set of these three chips is called the CHIPSet CS82310, with the marketing name PEAK/DM. You can find an extensive data book e.g. at the location I linked. /GATE_A20 input is pin 36 of the 82c351.

Wow, impressive. Okay, this is more than I thought I'd ever be able to find! The BIOS description on this board says it is a PEAK/DM so this is a perfect match.

jakethompson1 wrote on 2021-07-27, 17:02:

mkarcher wrote on 2021-07-27, 16:53:

In this case, the input is an open CMOS pin, which can read high or low influenced by minimal amounts of stray charge that can be caused by leakage currents. I don't think it is heat related, but the time when the computer is shut down allows some stray charge to drain from the /GATE_A20 pin.

Ah, so it's the same reason unused i/o needs a pull up or pull down resistor? I wish I had taken some electronics or computer engineering courses because my theoretical knowledge in this area is nil...

Yes, exactly that. Different kind of chips handle unconnected input pins differently, so sometimes (e.g. in chips using TTL technology) an unconnected input is benign, but if a chip is built using CMOS technology and has no integrated pull-up or pull-down, you get random behaviour due to spurious input levels observed at that pin.

FrankieKat wrote on 2021-07-27, 17:19:

mkarcher wrote on 2021-07-27, 16:48:

In such cases, I usually scratch the solder mask from the copper traces on both sides of the break, and solder a thin strand of copper wire over the break, and fix/isolate the bodge with nail polish.

The via on the break itself is also damaged - if I probe it from both of it's sides, I get open so the top side of that is no use. Shortest fix I think will be on the bottom side of that trace (pictured below). I've got some 26 AWG bodge wire, do you think I could remove the solder mask on those vias (lacquer thinner?) tin the wire, solder it into the via cup and adhere it down? Those traces are tiny in real life!

I would stay clear of chemicals like laquer thinner. I wouldn't know how to apply them to spots that small with the tools I have. Instead, I use a sharp knife (like an x-acto knife) to scratch the solder mask. You can clearly see the color change to pure copper color when the solder mask is removed. Maybe the broken via is correded through the board, and you need to solder to the trace next to the wire.

Solder resist is doing its job perfectly: It resists being soldered to. So if you have a small area where the solder resist is removed, and you put a blob of liquid solder over that area, the solder will stick perfectly to the spot where the solder resist has been removed from the trace, and doesn't stick to neighbouring traces.

FrankieKat wrote on 2021-07-27, 17:04:

Okay, I'm off to attempt repair on that trace. Seems like a lot more of a smoking gun than the flakey keyboard ground too.

Pin 21 is /RC signal, it is soft-reset function that is initiated by KBC after you ask it nicely (required on 286 to return from protected to real mode). It might very well be routed through '06 to have it wire-anded with other reset sources. Ultimately it should reach chipset. But that should not in any way prevent correct A20 gate operation even if the connection is broken. On KBC this is P20, which means port 2, bit 0, and again - on pin 21.

GA20 signal is pin 22, and this is P21 - port 2, bit 1. I can see how seeing P21 can be easily confused with pin 21. Make sure you are tracing the correct signal - I find it very odd that GA20 would be routed through a very slow OC gate.

And here's an ASM code snipped to try (add the missing functions from original):

1enable_A20:
2        cli
3 
4        call    a20wait
5        mov     al,0xD0
6        out     0x64,al
7 
8        call    a20wait2
9        in      al,0x60
10        push    ax
11 
12        call    a20wait
13        mov     al,0xD1
14        out     0x64,al
15 
16        call    a20wait
17        pop     ax
18        and     al,0xCD
19        or      al,0x12
20        out     0x60,al
21 
22        call    a20wait
23        sti
24        ret

Deunan wrote on 2021-07-27, 17:38:

FrankieKat wrote on 2021-07-27, 17:04:

Okay, I'm off to attempt repair on that trace. Seems like a lot more of a smoking gun than the flakey keyboard ground too.

Pin 21 is /RC signal, it is soft-reset function that is initiated by KBC after you ask it nicely (required on 286 to return from protected to real mode). It might very well be routed through '06 to have it wire-anded with other reset sources. Ultimately it should reach chipset. But that should not in any way prevent correct A20 gate operation even if the connection is broken. On KBC this is P20, which means port 2, bit 0, and again - on pin 21.

GA20 signal is pin 22, and this is P21 - port 2, bit 1. I can see how seeing P21 can be easily confused with pin 21. Make sure you are tracing the correct signal - I find it very odd that GA20 would be routed through a very slow OC gate.

In Re: 386 motherboard > 1MB / A20 woes , the OP shows that while the text says "pin 21", the signal that was traced actually originates from pin 22. I see no problem routing GA20 through that slow OC gate. The propagation time through the OC gate is negligible compared to the latency introduced by the keyboard controller firmware. GA20 is static during normal bus operation, so you can run the FSB at 33MHz even with GA20 routed through slow logic.

mkarcher wrote on 2021-07-27, 17:43:

Deunan wrote on 2021-07-27, 17:38:

FrankieKat wrote on 2021-07-27, 17:04:

Okay, I'm off to attempt repair on that trace. Seems like a lot more of a smoking gun than the flakey keyboard ground too.

Pin 21 is /RC signal, it is soft-reset function that is initiated by KBC after you ask it nicely (required on 286 to return from protected to real mode). It might very well be routed through '06 to have it wire-anded with other reset sources. Ultimately it should reach chipset. But that should not in any way prevent correct A20 gate operation even if the connection is broken. On KBC this is P20, which means port 2, bit 0, and again - on pin 21.

GA20 signal is pin 22, and this is P21 - port 2, bit 1. I can see how seeing P21 can be easily confused with pin 21. Make sure you are tracing the correct signal - I find it very odd that GA20 would be routed through a very slow OC gate.

In Re: 386 motherboard > 1MB / A20 woes , the OP shows that while the text says "pin 21", the signal that was traced actually originates from pin 22. I see no problem routing GA20 through that slow OC gate. The propagation time through the OC gate is negligible compared to the latency introduced by the keyboard controller firmware. GA20 is static during normal bus operation, so you can run the FSB at 33MHz even with GA20 routed through slow logic.

This confusion is most certainly my mistake. In all places I'm referring to the /A20GATE pin, referred to as "P21" in the symbol description, which is physical package Pin 22. I'll go back and correct any errors in my previous posts.

mkarcher wrote on 2021-07-27, 17:36:

I would stay clear of chemicals like laquer thinner. I wouldn't know how to apply them to spots that small with the tools I have. Instead, I use a sharp knife (like an x-acto knife) to scratch the solder mask. You can clearly see the color change to pure copper color when the solder mask is removed. Maybe the broken via is correded through the board, and you need to solder to the trace next to the wire.

Solder resist is doing its job perfectly: It resists being soldered to. So if you have a small area where the solder resist is removed, and you put a blob of liquid solder over that area, the solder will stick perfectly to the spot where the solder resist has been removed from the trace, and doesn't stick to neighbouring traces.

Well everyone, I bridged that bad trace and it booted up to all of the RAM *and* also now works with the default HIMEM.SYS handler so it sounds like we found the culprit!

Thanks for all of the amazing troubleshooting thoughts and advice, and helping to save/preserve one more great old PC!

FK