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First post, by aspiringnobody

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Hello all --

I've got a HP Vectra XM2 that I'm trying to get going. It has the OPTi 82C802G chipset. I have two amd 5x86s -- one "regular" one and one trinity upgrade version with the voltage regulator. The board is DX4 aware and auto-detects voltage. I can only get the "regular" 5x86 to boot if I set the board for DX2 mode, and only at 25mhz fsb. If I set it for DX4 mode, I assume it is enabling the writeback cache and failing to post. I can get the trinity chip to run at any of its supported speeds as long as I force it into write-through mode. It is detected as a DX4 if on 3x multi (including as an intel DX4-120mhz!), or DX2 if on 4x multi.

In any case all of the switch settings for the trinity chip that enable writeback fail to post. Is there a way to enable writeback cache after the system boots? AFAIK the chipset should support it. I got this system because it was impossible to source a L2 cache chip for my Compaq Deskpro -- but this system performs worse at 160mhz w/ 256k L2 (L1 in writethrough mode) than the Compaq did at 133mhz with no cache at all (L1 in writeback). Very disappointed to say the least.

Hope someone can help! It's a nice looking system otherwise! Very clean, and a very slick power supply that puts the fan right above the cpu for good cooling. I'd very much like to save it.

Reply 1 of 6, by mpe

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DX4 chips are available both in write-through and write-back variant with perhaps former being a little more common. I don't believe there is any performance diffence between these chips.In fact write-back might underperform slightly in many tests.

Cache mode operation cannot be enabled after the system boots. The configuration is sampled from WT/WB pin configuration which is usually controlled by jumper and can be only changed at reset.

The chipset might support WB, but it is also important if the motherboard connect relevant signals from the CPU, which cannot be taken for granted. Many 486 motherboards don't support it.

Last edited by mpe on 2021-08-28, 23:13. Edited 1 time in total.

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Reply 2 of 6, by jakethompson1

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If write-back internal cache made no difference, or were even slower than write-through, why would Intel have gone to all the trouble to revise the 486 pinout to add write-back support?

aspiringnobody have you looked at this page? http://web.inter.nl.net/hcc/J.Steunebrink/amd5x86.htm
You may need to pull out your multimeter, and see if the new CPU pins added for write-back support are going to jumpers on the motherboard and that they are connected properly. The reason 486 boards have so many jumpers is that old AMD and Cyrix chips defined those pins differently before Intel stepped in and standardized the "P24D" pinout. Changing the jumpers can actually change where particular pins on the 486 socket go to on the board.

Reply 3 of 6, by aspiringnobody

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jakethompson1 wrote on 2021-08-28, 21:12:

If write-back internal cache made no difference, or were even slower than write-through, why would Intel have gone to all the trouble to revise the 486 pinout to add write-back support?

aspiringnobody have you looked at this page? http://web.inter.nl.net/hcc/J.Steunebrink/amd5x86.htm
You may need to pull out your multimeter, and see if the new CPU pins added for write-back support are going to jumpers on the motherboard and that they are connected properly. The reason 486 boards have so many jumpers is that old AMD and Cyrix chips defined those pins differently before Intel stepped in and standardized the "P24D" pinout. Changing the jumpers can actually change where particular pins on the 486 socket go to on the board.

I only have a bank of dips that don’t seem related to the cache (1-5 are for other things on the board and 6-8 are marked “reserved”) and six jumpers (3 for the fsb and 3 to select the DX4 multiplier. It’s a late PCI board so it seems to auto detect and configure most things. I’m fairly sure if I select a DX4 multiplier it is trying to enable the writeback cache and that’s why the “regular” 5x86 won’t post unless I set the board for DX2 mode by not selecting a DX4 multiplier. But as you say the intel and amd wb cache implementation must be too different for it to work in auto mode. They system just locks up before it even initializes the gpu.

The cache can definitely be enabled by changing registers, the link you mentioned seems to reference a utility he developed for that purpose at the very end.

To the guy who said WB isn’t a performance gain — my 5x86 @160mhz in write through L1 w/ 256k of level 2 cache performs WORSE than in another pc with the same cpu @133mhz (L1 in writeback) and NO level 2 cache.

So I’d say that a pretty big performance hit.

Reply 4 of 6, by mpe

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jakethompson1 wrote on 2021-08-28, 21:12:

If write-back internal cache made no difference, or were even slower than write-through, why would Intel have gone to all the trouble to revise the 486 pinout to add write-back support?

That's a good question. Write-back cache architecture is a trade off. It allows CPU to be much less blocked by write operations. Thus the can perform more work during that time. On the other hand it could also happen that a read operation might trigger a write-back cycle where a modified line needs to be written back to RAM and replaced with new data. This requires more time than just simple read as in write-through architecture and comes with some read performance penalty.

Whether that trade off is a win depends on the mix (how many reads there are vs writes) and how fast the CPU is.

In 486/DOS software era that trade-off was not necesarily worth it. Later as the CPU performance increased and bus traffic profile of software changed, CPU writes became more important than reads and write-back architecture started to pay off. But that did not really happen until Pentium era.

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Reply 5 of 6, by aspiringnobody

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mpe wrote on 2021-08-28, 23:06:
That's a good question. Write-back cache architecture is a trade off. It allows CPU to be much less blocked by write operations […]
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jakethompson1 wrote on 2021-08-28, 21:12:

If write-back internal cache made no difference, or were even slower than write-through, why would Intel have gone to all the trouble to revise the 486 pinout to add write-back support?

That's a good question. Write-back cache architecture is a trade off. It allows CPU to be much less blocked by write operations. Thus the can perform more work during that time. On the other hand it could also happen that a read operation might trigger a write-back cycle where a modified line needs to be written back to RAM and replaced with new data. This requires more time than just simple read as in write-through architecture and comes with some read performance penalty.

Whether that trade off is a win depends on the mix (how many reads there are vs writes) and how fast the CPU is.

In 486/DOS software era that trade-off was not necesarily worth it. Later as the CPU performance increased and bus traffic profile of software changed, CPU writes became more important than reads and write-back architecture started to pay off. But that did not really happen until Pentium era.

So I guess the question is mostly a matter of the software you run? This PC (and I’d wager the majority of all other vintage PCs in operation today) is purely for games. That is writeback biased yes?

Reply 6 of 6, by mpe

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Yes. Contemporary DOS software, like VGA games has chance to be less affected by write stalls than let's say UNIX or 32-bit multitasked workloads.

Obviously, back then Intel was more concerned about improving performance in high-end tasks when designing future CPUs.

I measured WB vs WT on a number of different 486 boards and different CPUs, and there is hardly any difference, with perhaps WT CPUs being a tiny bit faster in simple stuff like DOOM (like 28.7fps vs 29fps on P24D vs P24).

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