The asus p5a has something about it that makes it faster than other mobos with the chipset.

That note is why I recommend 1.04 😉

Also 1.05/6 has buggy voltage from my testing, 1.04 is just the best revision imho. I had 1.06 and 1.04 and hated the 1.06.

A user in the k6 3 aiming for the stars thread made a custom bios for the gigabyte equivalent board and managed to improve its performance by using some internal timing settings from the p5a bios. So the p5a indeed has some special sauce of some sort in it.

Most k6-3+ records in that thread are using it from my recall.

It would be quite problematic hunt for specefic MB version this days...
I looked at my HW list and I should have Asus P5A-VM rev. 1.05 with Ali M1541 + M1543C chipset, 512kB L2 somewhere... So as it is 1.05 it would also has issues, If I will dig it some day I could give it a chance...

K6-2/3+ Success on Asus P5A 1.06 - simple mod

Thanks for info, just for curiosity I measured the level on WB/WT# pin on my Gigabyte and it's already high (3.3V) so nothing to mod there... As I read the thread it seems to affect only K6+ CPUs? Someone with a non+ K6 reported that mod hadn't any effect.

Apparently only +. Correct.

RayeR have you made any revisions to your pcb design or do you plan any? Did you ever decide to incorporate any of the tillamook mods or are they already present.

Which pins do you recommend?

Thinking about ordering one

I updated PCB layout for known cache and VCC2DET mods (on my current PCB done by wires) but I don't plan to send it to JLC as I don't have any other CPU. Also the thermal via array below the core should be made a bit smaller to prevent solder leaking throug vias that are not lying directly under the core and some more blocking caps should be added on top side.

RayeR wrote on 2024-02-03, 00:19:

I updated PCB layout for known cache and VCC2DET mods (on my current PCB done by wires) but I don't plan to send it to JLC as I don't have any other CPU. Also the thermal via array below the core should be made a bit smaller to prevent solder leaking throug vias that are not lying directly under the core and some more blocking caps should be added on top side.

Okay. If you plan on doing this I will wait. If not, I may play with it if you uploaded source.

RayeR wrote on 2024-02-03, 00:19:

thermal via array below the core should be made a bit smaller to prevent solder leaking throug vias

JLC supports via in pad, they even have option of copper epoxy filled capped vias

rasz_pl wrote on 2024-02-03, 08:30:

RayeR wrote on 2024-02-03, 00:19:

thermal via array below the core should be made a bit smaller to prevent solder leaking throug vias

JLC supports via in pad, they even have option of copper epoxy filled capped vias

Copper epoxy? As in some sort of thermally conductive epoxy kinda deal?

More, smaller vias it seems like might be another solution as said. Let surface tension/capillary action whatever help it from oozing out. But epoxy would certainly stop the flow.

rasz_pl wrote on 2024-02-03, 08:30:

JLC supports via in pad, they even have option of copper epoxy filled capped vias

I know, I already used them for a prototype at work where I need via in pads of a fine-pitch BGA. But in that time I designed the interposer they probably didn't have it yet...