Just in case it won't work, I recommend giving wiretap's Mini ISA ROM card a chance.
It's a near project and useful if you need multiple option ROMs or have a need for a card to piggy-back onto another ISA card.
"Time, it seems, doesn't flow. For some it's fast, for some it's slow.
In what to one race is no time at all, another race can rise and fall..." - The Minstrel
//My video channel//
jmarsh wrote on 2022-11-27, 23:48:The 3C509B (specified in thread title) does let you select the window. https://www.janwagemakers.be/PIC18F452_3COM_3 … rnet/3c5x […]
maxtherabbit wrote on 2022-11-27, 23:09:The 3c509 does not allow you to pick which half (/quarter) of the ROM you use. If you choose a window smaller than the physical size of the chip you will always get the upper part of the data.
The 3C509B (specified in thread title) does let you select the window.
https://www.janwagemakers.be/PIC18F452_3COM_3 … rnet/3c5x9b.pdf
See page 54 "ROM control register".The size of the UMA used by the card is fixed at 16KB.
Ok I stand corrected, the hardware is capable. However, the configuration utility does not expose this bank switching option to the user
maxtherabbit wrote on 2022-11-28, 15:27:Ok I stand corrected, the hardware is capable. However, the configuration utility does not expose this bank switching option to the user
Right, but the point was the 3C509B drives the upper address lines rather than just tying them high and it only exposes a fixed 16K window regardless of the chosen ROM size - so the guaranteed way to get XTIDE at the right place in memory is to use repeated copies in the ROM, since who knows what default setting the ROM control register uses...
jmarsh wrote on 2022-11-28, 18:38:maxtherabbit wrote on 2022-11-28, 15:27:Ok I stand corrected, the hardware is capable. However, the configuration utility does not expose this bank switching option to the user
Right, but the point was the 3C509B drives the upper address lines rather than just tying them high and it only exposes a fixed 16K window regardless of the chosen ROM size - so the guaranteed way to get XTIDE at the right place in memory is to use repeated copies in the ROM, since who knows what default setting the ROM control register uses...
I believe it's safe to say we've experimentally determined the default to be at the top of the ROM space. But I digress, I agree with you that proper duplication is the superior approach
Ok so finally success. I managed to get the 3com working. An above poster mentioned the checksum of the rom. So lots of reading and people had put there bin file into the xtidecfg.com program first. I made no changes but saved back to the bios bin file. When i loaded it into the programmer the checksum was different. So i quickly burned a rom padding with zeros and powered on and it worked!
Onto newer adventures!
With all the tension i managed to damage my I/O card the ide pin has broken solder. Will have to reflow.
Is there any chance the ide port address could conflict with the video cards address? When i tried the CF adaptor i got post beeps only and it wouldn't boot. Im hoping its the dmg pin thats causing problems.
post beeps is really bad, plugged CF wrong way around bad
