Given the datasheet for the ATT20C490,
has anyone disassembled the bios and checked for the 'Software identification' part of the datasheet ?

meh, nevermind, likely a moot point.

CoffeeOne wrote on 2023-07-04, 20:39:

Yes, but 1024 x 768 65000 col. should / could work also with a 80MHz RAMDAC. Am I correct?

Yes it works, but only in interlaced mode.

I suspect the ARK branded PLL won't matter, but I was already putting in an IC order, so I added one of these for $2. I also ordered the ATT20C490-11 for $8 and grabbed two. Maybe the second will come in useful down the road.

If you like big numbers in synthetic benchmarks you can remove R35 and R36 for a core and memory frequency of 80Mhz.
Removing only R36 gives 65Mhz and removing only R35 gives 70Mhz. 80Mhz worked fine on my card with only the 1MB onboard memory.

My card started artifacting at 89Mhz (crystal swap) so at 80 Mhz there is not much headroom left.

Interesting. So the Bali32 and the 2Themax cards were both available with 110MHz RAMDACs? I didn't know that.
Other than the different RAMDACs, have you noticed any other physical differences between your card and the Bali32?
Have you tried using a Bali32 BIOS with Bali32 driver package?

feipoa wrote on 2023-07-04, 23:53:

CoffeeOne wrote on 2023-07-04, 20:39:

Yes, but 1024 x 768 65000 col. should / could work also with a 80MHz RAMDAC. Am I correct?

Yes it works, but only in interlaced mode.

OK, but why?
1024x768 256 col and 1024x768 64k col need the same clock rate of the RAMDAC (or not?). So there must be another reason. The 256col mode needs 1MB only, the 64k col mode needs 2 MB. So memory bandwidth too low?

In your posting above there was something with 1MB => 70ns, 2MB => 45ns?

EDIT: I guess I am wrong with this assumption.
I found this for RAMDACs used in Mach64 cards:
http://www.xfree86.org/3.3.6/Mach641.html
So early RAMDACs have a reduced clock rate with more colours.
I datasheet of the Ark RAMDAC which is on the Octec card would be really nice to have.

mpe wrote on 2022-07-09, 20:23:

I believe the ARK RAMDAC is a clone (rebranded copy) of AT&T 21C498 part.

Re: Ark Logic PCI, an interesting VGA card.

Edit nevermind thats not true.

Dorunkāku wrote on 2023-07-05, 20:03:

mpe wrote on 2022-07-09, 20:23:

I believe the ARK RAMDAC is a clone (rebranded copy) of AT&T 21C498 part.

Re: Ark Logic PCI, an interesting VGA card.

Nice.
So it has a maximum speed of 170MHz?

http://www.mouser.com/catalog/specsheets/tvp3409.pdf

EDIT: Actually that is another RAMDAC on the PCI in the linked thread. On my VLB card, there is an ARK1491 chip.

MORE EDIT:
The Ark1491 might be re-branded AT&T 20C491-11 chip. So a 110MHz RAMDAC, but still the 2 modes where 2MB are needed (1024x768 65000c and 1280x1024 256c) are interlaced only.

@ Dorunkāku
Interesting. I might try this. Was there any speed difference in DOOM or any other games? What memory speed were you running? I've since socketed my DRAM and PLL as shown:

@ AC
I have not noticed any physical differences between the 2themax and Bali32 cards. I have the Bali BIOS and will test the Bali BIOS once I get the 110 MHz RAMDAC.

@ CoffeeOne
I have since replaced the DIP DRAM with 50 ns, but left the SOJ as 60 ns. Anyone have a part number for 50 ns SOJ DRAM that is FPM only (not EDO)?

CoffeeOne wrote on 2023-07-05, 20:13:

The Ark1491 might be re-branded AT&T 20C491-11 chip. So a 110MHz RAMDAC, but still the 2 modes where 2MB are needed (1024x768 65000c and 1280x1024 256c) are interlaced only.

It would not surprise me if the ARK1491 is a re-branded ATT20C491-11. The guy I obtained the 2themax card from had compared both the Bali32 w/80 MHz Winbond RAMDAC and the 2themax with ARK1491 and noted that the 2themax demonstrated marginally better output quality. If not for the comment in the 2themax manual stating that non-interlaced 1280x1024x256c is possible with the 110 MHz RAMDAC, I wouldn't be pursuing this. I hope it is not an error of the employee tasked with writing the manual.

Does refresh rate come in to it as well? 1280*1024 is 1.3M pixels. Allow a factor of say 1.4 for blank times for horizontal and vertical flyback, so 1.8M. I think that with a clock of 110MHz that gives around 60Hz max, without any worries about colour depth and memory data rates? And maybe high contrast areas would start looking a bit soft if the DAC struggles to swing the outputs fast enough.

feipoa wrote on 2023-07-05, 21:24:

If not for the comment in the 2themax manual stating that non-interlaced 1280x1024x256c is possible with the 110 MHz RAMDAC, I wouldn't be pursuing this. I hope it is not an error of the employee tasked with writing the manual.

That's not an error. That's in your BIOS. I reversed a lot of it, and I wrote a preliminary register specification in VGADOC style. After an EDIT: Updated with further knowledge obtained from looking at the XFree86 3.3.6 source code.

1ARK1000VL  32-bit memory interface; 8-bit DAC interface; VL bus
2ARK1000PV  32-bit memory interface; 8-bit DAC interface; VL/PCI
3ARK2000PV  64-bit memory interface; 16-bit DAC interface; VL/PCI
4
53c4h index 10h (R/W):  SEQ: feature enable bits
6bit 0-5  misc feature enable bits, e.g. accelerator, VESA memory addressing,
7         linear aperture. In SVGA mode, enable 64K aperture at A0000 if no
8         LFB is required.
9    6-7  0: 1MB; 1: 2MB; 2: 4MB (ARK2000 only); 3: reserved
10
113c4h index 11h (R/W):  SEQ: Extended output register
12bit 0-1  Giant Shift Register mode (0 = VGA-compatible; 1 = 16-color SVGA;
13                                    2 = 256+ color SVGA)
14    2-3  Accelerator bit depth (0 = 16 colors; 1 = 256 colors;
15                                2 = 64K colors; 3 = 16M colors (ARK2000))
16    6-7  Bits 2,3 of clock index
17
183c4h index 12h (R/W):  SEQ:
19bit 0-1  Aperture size (0 = 64K, 1 = 1M, 2 = 2M, 3 = 4M (ARK2000 only))
20
213c4h index 13h (R/W):  SEQ: LFB base low
22bit 0-7  Address bits A16-A23 of linear window
23
243c4h index 14h (R/W):  SEQ: LFB base high
25bit 0-7  Address bits A24-A31 of linear window
26
273c4h index 15h (R/W):  SEQ: Write bank
28bit 0-5  bank for writing (in 64K units)
29
303c4h index 16h (R/W):  SEQ: Read bank
31bit 0-5  bank for reading (in 64K units)
32
333c4h index 17h (R/W):  SEQ:
34bit 0-2  accelerator framebuffer width in pixels (0 = 640; 1 = 800; 2 = 1024;
35                 4 = 1280; 5 = 1600; 6 = 2048) [Maybe 3 = 1152?)]
36         this is only used in "X-Y mode" of the accelerator
37
383c4h index 18h (R/W):  SEQ: FIFO control
39bit 0-2  FIFO refill threshold (if there are at least this much free words,
40           request DRAM access to refill display fifo). ARK2000: measured in
41           units of 2 words
42      3  Enable 8-level FIFO if set (? if clear)
43      4  Enable 16-level FIFO if set                    (ARK2000 only)
44      5  FIFO refill threshold bit 3 (extends bit 0-2)  (ARK2000 only)
45      7  FIFO refill threshold bit -1 (extends bit 0-2 to the low end)
46                                                        (ARK2000 only)
47
483c4h index 19h (R/W):  strapping bits
49bit   0  DAC type: 0=110MHz, 1=80MHz
50      7  bus type: 1=VL, 0=PCI    (not on ARK1000VL)
51
523c4h index 1Ah (R/W):  SEQ BIOS flags 1
53bit   0  bit 1 of refresh rate for 800x600x32K/64K
54      1           refresh rate for 800x600x16M
55      2  bit 1 of refresh rate for 640x480x256
56      3  bit 1 of refresh rate for 640x480x32K/64K
57
583c4h index 1Bh (R/W):  SEQ BIOS flags 2
59bit   0  bit 0 of refresh rate for 640x480x256
60    1-2           refresh rate for 800x600x16/256

61    3-4           refresh rate for 1024x768x16/256
62      5           refresh rate for 1280x1024x16/256
63      6  bit 0 of refresh rate for 640x480x32K/64K
64      7  bit 0 of refresh rate for 800x600x32K/64K
65
663c4h index 1Ch (R/W):  SEQ: DPMS control register
67bit 0-1  Power mode: 0=On, 1=Standby, 2=Suspend, 3=Off
68      2  Activate low-power mode (blank display?)
69      7  GPO bit, used as RS2 for ICS5342
70
713c4h index 1Dh (R/W):  SEQ: Feature control
72bit   0  Unlock extended registers
73
743c4h index 1Eh (R/W):  SEQ BIOS flags 3  (ARK2000 only?)
75bit 0-7  scratch register
76
773c4h index 1Fh (R/W):  SEQ BIOS flags 4  (ARK2000 only?)
78bit 0-7  scratch register
79
803c4h index 20h (R/W):  SEQ Cursor control
81bit 0-1  color depth: 0 = 256 colors, 1 = 16bpp, 2 = 24bpp
82      2  cursor size: 0 = 32x32; 1 = 64x64
83      3  show cursor
84      4  cursor type: 0 = Windows; 1 = X11
85
863c4h index 21h (R/W):  SEQ Cursor X high
87bit 0-?  bits 8-? of cursor X coordinate
88
893c4h index 22h (R/W):  SEQ Cursor X low
90bit 0-7  bits 0-7 of cursor X coordinate
91
923c4h index 23h (R/W):  SEQ Cursor Y high
93bit 0-?  bits 8-? of cursor Y coordinate
94
953c4h index 24h (R/W):  SEQ Cursor Y low
96bit 0-7  bits 0-7 of cursor Y coordinate
97
983c4h index 25h (R/W):  SEQ Cursor memory address
99bit 0-5  cursor base (in units of 256 bytes, starting at vmemsize - 16K)
100
1013c4h index 26h (R/W):  SEQ Cursor foreground color 1
102bit 0-7  cursor foreground color (palette index, or low byte (with blue) of direct color value)
103
1043c4h index 27h (R/W):  SEQ Cursor foreground color 2
105bit 0-7  cursor foreground color, second byte (high byte in 16bpp, green in 24bpp)
106
1073c4h index 28h (R/W):  SEQ Cursor foreground color 3  (ARK2000 only?)
108bit 0-7  cursor foreground color, third byte (red in 24bpp)
109
1103c4h index 29h (R/W):  SEQ Cursor background color 1
111bit 0-7  cursor background color (palette index, or low byte (with blue) of direct color value)
112
1133c4h index 2Ah (R/W):  SEQ Cursor bcakground color 2
114bit 0-7  cursor background color, second byte (high byte in 16bpp, green in 24bpp)
115
1163c4h index 2Bh (R/W):  SEQ Cursor background color 3  (ARK2000 only?)
117bit 0-7  cursor background color, third byte (red in 24bpp)
118
1193c4h index 2Ch (R/W):  SEQ Cursor X offset
120bit 0-?  cursor X origin (start pixel inside cursor bitmap)
121
1223c4h index 2Dh (R/W):  SEQ Cursor Y offset
123bit 0-?  cursor Y origin (start row inside cursor bitmap)
124
1253d4h index 40h (R/W):  CRTC: Extended overflow register 1
126bit   4  Bit 10 of Vertical retrace start (3d4h index 10h)
127      5  Bit 10 of Vertical blank start (3d4h index 15h)
128      6  Bit 10 of Vertical displayed (3d4h index 12h)
129      7  Bit 10 of Vertical total (3d4h index 6)
130
1313d4h index 41h (R/W):  CRTC: Extended overflow register 2
132bit 0-2  Bits 16-18 of start address (3d4h index 0Ch, 0Dh)
133      4  Bit 8 of Horizontal retrace start (3d4h index 4)
134      5  Bit 8 of Horizontal blank start (3d4h index 2)
135      6  Bit 8 of Horizontal display end (3d4h index 1)
136      7  Bit 8 of Horizontal total (3d4h index 0)
137
1383d4h index 41h (R/W):  CRTC: Extended overflow register 3
139bit   3  Bit 8 of Offset (3d4h index 13h)
140
1413d4h index 32h (R/W):  CRTC: Interlaced mode vertical retrace offset
142bit 0-7  Horizontal total for last scan line of an interlaced frame
143
1443d4h index 44h (R/W):  CRTC:
145bit   2  Enable interlaced mode
146    4-5  Extended character clock modes?
147
1483d4h index 46h (R/W):  CRTC:      (ARK2000 only)
149bit   2  Selects 16-bit DAC pixel path if set
150
1513d4h index 50h (R):    CRTC: Chip ID
152bit 0-2  Chip revision
153    3-7  Chip type (?? = ARK1000VL; 12 = ARK1000PV; 13 = ARK2000PV;
154                    14 = ARK2000MT; 15 = ATK2000ML)
155
156
157  Video Modes:
158       VESA:
159  24h  109h  T  132   25   16  
160  26h  10Ah  T  132   43   16
161  27h  10Bh  T  132   50   16
162  31h  102h  G  800  600   16  PL4  (also 6Ah)
163  32h  104h  G 1024  768   16  PL4
164  33h  106h  G 1280 1024   16  PL4
165  40h  101h  G  640  480  256  P8
166  41h  103h  G  800  600  256  P8   (also 47h)
167  42h  105h  G 1024  768  256  P8
168  43h  107h  G 1280 1024  256  P8
169  44h        G 1600 1200  256  P8   (requires 110MHz DAC, limited support by VESA extensions)
170  4Fh  100h  G  640  400  256  P8
171  50h  110h  G  640  480  32K  P15
172  51h  113h  G  800  600  32K  P15
173  52h  116h  G 1024  768  32K  P15
174  54h  111h  G  640  480  64K  P16
175  55h  114h  G  800  600  64K  P16
176  56h  117h  G 1024  768  64K  P16
177  58h  112h  G  640  480  16M  P24
178  59h  115h  G  800  600  16M  P24  (requires 110MHz DAC)

The presence of a 110MHz DAC is detected by the BIOS by reading 3C4 index 19h, bit 0. I can not find any writes to that register in the BIOS code, which would indicate that this register is possibly read-only, and might be initialized from some pull-up, pull-down or 0-ohm strapping resistors on the board. Having a 110MHz DAC unlocks two video modes and a second timing variant on the 1280x1024x16 and 1280x1024x256 mode.

You might try whether the DAC type bit is writeable by running this code in DEBUG:

1-a100
20100    mov dx,3c4
30103    mov al,19
40105    out dx,al
50106    inc dx
60107    in al,dx
70108    and al,FE
8010A    out dx,al
9010B    int 3
10010C 
11-g
12(...some register dump)
13-q

First edit: fixed logic (need to set to 0, not to set to 1)

Second edit: fixed DEBUG assembly syntax

@mkarcher
Very impressive; thank you for this code deconstruction.

I didn't see any mention of 1024x768x64k. Do you know if this mode works in non-interlaced mode at 60 Hz w/110 MHz RAMDAC, or if just 1280x1024x256c works in non-interlaced mode w/110 MHz RAMDAC?

If the RAMDAC does not self-identify its speed through some internal register or setting, and we are unable to determine which 0-ohm resistor on the PCB sets 110 MHz, is it possible to hard-code the 110 MHz setting in the BIOS?

I will look into the DEBUG code late this evening, if I'm not too tired (I'm doing a paverstone project around my house right now).

feipoa wrote on 2023-07-05, 22:53:

I didn't see any mention of 1024x768x64k. Do you know if this mode works in non-interlaced mode at 60 Hz w/110 MHz RAMDAC, or if just 1280x1024x256c works in non-interlaced mode w/110 MHz RAMDAC?

There is just a single timing for 1024x768x32k/64k in the BIOS, so I guess that one is the interlaced timing. This mode is not affected by the 110MHz flag.

feipoa wrote on 2023-07-05, 22:53:

If the RAMDAC does not self-identify its speed through some internal register or setting, and we are unable to determine which 0-ohm resistor on the PCB sets 110 MHz, is it possible to hard-code the 110 MHz setting in the BIOS?

That one will be easy: At offset 4391h in the BIOS, there is the byte 74h which is the opcode a conditional jump instruction that is supposed to skip the limiting code if an 110MHz DAC is installed. You can replace it by EBh, to skip the limiting in any case. This will increase the sum of all BIOS bytes by (EBh - 74h) = 77h. To compensate, you have to decrease the checksum byte at offset 7fffh by the same amount, so it becomes D8h - 77h = 61h.

Be aware that this will make the BIOS obey the "1280x1024 noninterlaced" setting. You still need to configure the mode to run non-interlaced, though. If your configuration tool also checks the RAMDAC type bit, it will not allow you to configure that timing.

feipoa wrote on 2023-07-05, 22:53:

I will look into the DEBUG code late this evening, if I'm not too tired (I'm doing a paverstone project around my house right now).

Please look at the DEBUG post again, if you already typed down the commands. I got the logic wrong. The old code (before edit) will try to configure 80MHz, not 110MHz!

I looked into the mode parameters in the BIOS. It seems the parameters for the 1280x1024 interlaced mode are wrong, and run at 120MHz pixel clock instead of 80MHz pixel clock. This will result in a refresh rate of 130Hz (interlaced) instead of 87Hz (interlaced). It's not surprising that you get issues syncing to that signal with any kind of LCD. Furthermore, in 800x600x64K at 70Hz as well as 1024x768x64K at 87i Hz the 80MHz RAMDAC is overclocked at a byte rate of 94.5MB/s, resulting in a pixel rate of 47.7MHz. The datasheet is quite clear that the 80MHz RAMDAC is limited to 80MB/s at any kind of color depth on the ARK1000. The AT&T DAC supports a 16bit double-data-rate transfer mode, but the ARK BIOS doesn't enable it - likely because the ARK1000 chip doesn't support it. In the DDR mode, you may run at up to 66.6MHz pixel clock, i.e. 133.3MB/s.

With the 110MHz RAMDAC, the 800x600x16M mode is available at 56Hz (110MB/s) or 60Hz (120MB/s, again overclocking the DAC).

That is unfortunate news concerning the 1024x768x64K mode having only one option, namely interlaced. Maybe the Bali32 VGA BIOS tries to force non-interlaced mode? I've attached it here.

I ran the DEBUG commands, but received an error:

When I was installing the drivers in Windows 95, I noticed that there were two options listed:
ARK Logic 32-bit VL
ARK Logic 64-bit VL

I've been using the 32-bit VL option. Wasn't only the ARK2000 series 64-bit? Did some manufacturers use the ARK2000PV on a VLB card? Otherwise, why is there a 64-bit VL option listed?

feipoa wrote on 2023-07-06, 13:10:

When I was installing the drivers in Windows 95, I noticed that there were two options listed: ARK Logic 32-bit VL ARK Logic 64- […]
Show full quote

When I was installing the drivers in Windows 95, I noticed that there were two options listed:
ARK Logic 32-bit VL
ARK Logic 64-bit VL
ARK_Logic_64-bit_VL.PNG

I've been using the 32-bit VL option. Wasn't only the ARK2000 series 64-bit? Did some manufacturers use the ARK2000PV on a VLB card? Otherwise, why is there a 64-bit VL option listed?

There is an ARK2000PV on a VLB card, as far as I know. I believe AnonymousCoward informed me that this card was only sold via mail order and it’s unknown how many are out there. I presume not too many exist.

The 64-bit option would make sense for the ARK2000PV. As far as I understand, the ARK1000PV and ARK2000PV share VGA cores (mostly) and their main differences come from the Windows GUI acceleration side. The ARK2000PV is a 64-bit accelerator, as you mentioned.

I am somewhat curious if the ARK1000VL supports VLB 2.0. Technically, the Cirrus Logic GD5430 and GD5434 are VLB 2.0-capable. That implies 64-bit transfers might have been implemented on those cards, which VLB 2.0 can do. It would be interesting to determine if the ARK1000VL is a VLB 2.0 device and whether it can handle 64-bit transfers.

I doubt this would mean much in terms of performance, but it would be interesting, nonetheless. The Chips & Technologies F4041 and OPTi 895(A) (and I guess, by extension, the OPTi 802?) are explicitly VLB 2.0-capable chipsets, and the VLB 2.0 standard specifically allows for 64-bit burst reads and writes using two additional pins, B-41 and A-56, which are LBS64# and ACK64#, respectively. I am highly skeptical of this explanation as relates to the ARK drivers. I suspect you are correct and it is the first—insofar as we’re talking about a 64-bit accelerator in the guise of the ARK2000PV. I also have to say that I find it odd/lazy that the drivers would be shared amongst the two cards, with one being 32-bit and one being 64-bit, but I guess if they’re similar enough in design otherwise, it’s not too much of a stretch.

feipoa wrote on 2023-07-06, 13:10:

I ran the DEBUG commands, but received an error:
ARK1000VL_DEBUG.JPG

The error being the 'h'. do not type that 'h' .
and the 0, also leave that one out.

If we are able to obtain the VGA BIOS image for this phantom card, could we just desolder the ARK1000VL and replace it with an ARK2000PV? Or perhaps we could use the BIOS from the ARK2000PV PCI donor card?

Here's the update DEBUG result:

Overclocking from 55Mhz to 80Mhz showed no performance gain at all in 3DBENCH2.

Have a look at the Block diagram in these: