386 does not have any cache.

I'm speaking under correction, but I guess that the big ones might be ALU, MMU and some BUS interface stuff.

Cyberdyne wrote:

386 does not have any cache.

You are right, I got confused with l2 cache of the 486 that was external and l1 internal. Then why might be that big array in the lower left part...

Jo22 wrote:

I'm speaking under correction, but I guess that the big ones might be ALU, MMU and some BUS interface stuff.

Interesting guess, I compared with a m68k that has MMU and I think the upper part might be just that, it look like it anyway, Thanks I was wondering what it might be!

Searching for that I found a very interesting m68k comparison picture that make me believe the lower-left part might be some kind of rom storage.

the big box in the bottom left is the "control unit"?

source: https://jr.co.il/t/posters/intel-386-poster.htm

imi wrote:

the big box in the bottom left is the "control unit"?

source: https://jr.co.il/t/posters/intel-386-poster.htm

Well done imi! thanks to you another piece of the puzzle fall in place. If we accept this is the control unit then that would lead me to believe the alu and register are on the lower-right of the picture.

If nobody have other input, that would be sufficient for my project. Thank you imi, cyberdyne and jo22 ! 😀

ALU, registers and main data path are most likely the top third of the cpumuseum image. Bottom right might be the MMU and addressing logic?

Lower left is most likely a microcode ROM.

SarahWalker wrote:

ALU, registers and main data path are most likely the top third of the cpumuseum image. Bottom right might be the MMU and addressing logic?

Lower left is most likely a microcode ROM.

Microcode, and the remain of what you advance, is more on par with what I've compared so far. It is why I accept what you say as to be the right information. Thank you very much SarahWalker 😊

I'm so glad all you four helped get something straight for that project that I feel obligated to share the final result. My sister is an illustrator and offered me to do a painting for xmas. So we discussed about that idea to have a 386 cpu die for comic layout, but I found it was harder than I though to place concept over cpu parts. It's giclée on wood that she painted over, I hope you will have as much fun as I do watching it. http://junkskool.net/images/illustrations/Coo … urpeste_cpu.jpg

Lovely art work - Congratulations on a job welll done! And thanks for sharing, too! 😄

In case somebody else need this, there is a good description of 386DX die on Cpu-World :

It's helpful for sure! Thank you very much! 😃

By the way, the chart also mentions the virtual address space of 64TB.
- Which is true for virtual memory with the help of both the paging unit and the segmentation unit.

Makes me wish that Windows 3.x in Standard-Mode had gotten virtual memory support, too.
Because, the Standard-Mode kernal still used a segmented memory model, but with the addition of pointers.
Imagine: Windows 3.x being able to use 64TB! Or 1GB on an 286 system, at least! 😁

Edit: Excuse my terminology. Things are properly described here: https://www.deinmeister.de/x86modfd.htm