First post, by llm
this is disassembled from a game
mov dx, 3C4h
mov ax, 0F02h
out dx, ax
mov dl, 0CEh
mov ax, 3
out dx, ax
mov ax, 205h
out dx, ax
mov al, 8
out dx, al
ported to C with some infos i've found
https://fd.lod.bz/rbil/ports/other/p03c403c5.html
03C4 -W EGA TS index register
https://fd.lod.bz/rbil/ports/video/p03ce03cf.html
03CE -W EGA GDC index register
the above assembler is to my understanding this:
p: 0x3C5 p:0x3C4
outw(0x3C4, 0xF02); // 0b00001111_00000010 -> writes also 0x3C5
0xF 0x02
| |
| Map mask register
|
Write enable display memory plane 0..3
https://fd.lod.bz/rbil/ports/video/p03ce03cf.html#table-P0700
p:0x3CF p:0x3CE
outw(0x3CE, 3); // 0b00000000_00000011 -> writes also 0x3CF (3 = data rotate register, rotate-count=0, CPU-data overwrites) https://fd.lod.bz/rbil/ports/video/p03ce03cf.html#table-P0703
outw(0x3CE, 0x205); // 0b00000010_00000101 -> writes also 0x3CF (5 = mode register, mode2, plane source is CPU as set/reset) https://fd.lod.bz/rbil/ports/video/p03ce03cf.html#table-P0704
outb(0x3CE, 8); // 0b 00001000 -> writes only 0x3CE (8 = bit mask register, ???)
Index
00000010
is that correctly interpreted?