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Reply 40 of 41, by joeguy3121

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Gmlb256 wrote on 2023-02-10, 01:23:
Front Side Bus: It is a bus between the CPU and host bridge/memory controller hub (the chipset with the green heatsink near the […]
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joeguy3121 wrote on 2023-02-10, 00:52:

What is FSB?

Front Side Bus: It is a bus between the CPU and host bridge/memory controller hub (the chipset with the green heatsink near the Slot 1 CPU in the case of the ASUS P3B-F). On older computers, the CPU clock is based on the FSB frequency which it gets multiplied. For example: PIII-600 = 6.0 x 100 MHz FSB = 600 MHz.

I'm new to old school computer tech. Is it the blue box with switches on the P3B-F 1.04 motherboard?. I never bothered it.

Yes, some of the DIP switches are for the FSB frequency but it isn't necessary since it has a kind of SoftMenu mode (or JumperFree as ASUS calls it) which allows to set it in the BIOS setup. ASUS has the motherboard manual on their website, which explains it in a detailed way.

I see.
I've been looking everying on the internet for the pdf manual to the P3B-F 1.04 and didn't think to look on ASUS's site themselves. 🤪
Thank you very much!. 👍🏻

Last edited by joeguy3121 on 2023-02-10, 07:52. Edited 1 time in total.

Reply 41 of 41, by Jo22

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joeguy3121 wrote on 2023-02-10, 00:52:

What is FSB?. I'm new to old school computer tech.

In very old designs, it's the processor's bus.
ISA bus (AT-bus) on old PCs was wired/attached more or less directly to the 286/386 processors.
Same goes for memory, which was on ISA bus, too.
Or from another point of view, all three were wired in parallel to each others.
This was in pre-chipset days.

IDE was similar. It connected more or less directly to ISA bus or AT-Bus. Hence "ATA" hard disks (AT Attached).

By the late 80s, NEAT and other chipsets started to talk exclusively to the processor.
The chipset started to handle the i/o in the PC.
That's how it could do shadow memory, handle A20 gate more quickly, reserve Extended Memory for EMS etc..
The chipset began to isolate the CPU from the real hardware.

In this era, we used DIVIDERs rather than multipliers.
The CPU/chipset derived their operation frequency from an external crystal oscillator.

- Generally speaking, in electronics this was done by detecting rising/falling edges only sometimes.
That's why, say, an 80 MHz oscillator was required for getting a 40 MHz frequency.
Speaking under correction here, though.

In the 90s, after the 486 PCs, that strange (to me) south bridge/north bridge nomenclature became popular.
And it continued to be so popular throughout the 2000s.

Now we have x86 SoCs and the Apple M1/M2 systems which use different concepts.

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