What is the real behaviour of the trap flag during IRET in VME mode?

When the trap flag is set during a Virtual 8086 mode 16-bit IRET instruction (by the value popped into the FLAGS register's 13 bits (IOPL, Interrupt flag(popped into VIF instead) (and Virtual 8086 mode flag as well, but isn't popped due to it being 16-bits) are unaffected)), sources give different behaviour?

Looking at the Pentium behaviour described at http://www.rcollins.org/ddj/Mar98/Mar98.html , he mentions that for IRET, a #GP(0) doesn't occur?

But looking at Bochs' source code (https://sourceforge.net/p/bochs/code/HEAD/tre … /vm8086.cc#l132), it triggers #GP(0) on the trap flag?

Which source is correct? Or did the behaviour change on newer CPUs?