So far I've made it work for most modes, except 320x200x32K/64K:
- DAC in double mode: halve pixels(reverse DAC doubling).
- Linear mode(Sequencer memory mode register bit 3 set and Attribute Mode Control Register not in 8-bit mode): halve pixels.

But somehow, when specifying 320x200x32K/64K it also halves, when it shouldn't in that mode?

I see that the DCR bit isn't set for said mode. Perhaps it should be set for modes 313h and 413h?

It's set up for 640 pixels, which results in 320 pixels being rendered due to the DAC combining every 2 pixels into 1 pixel on display and renderer.

The weird thing is that DCR should be set for this to work. The other 32K/64K modes have double their pixels set, which works properly(doubled horizontal display timings values). But 320 pixel mode somehow doesn't result in it's proper 640 pixel wide display?

Edit: 320x200x32K/64K has the same horizontal settings as 640x350x32K/64K, but with half the size of the horizontal display end register and related horizontal timing settings?
That seems fine, but it will result in only half a display worth of pixels? DCR should actually be set to properly get the correct result?

Thinking about it, the 800x600 mode with 32K/64K colors double the horizontal timings(all character clock-based ones).

But won't that cause issues with the partial character clock matching(e.g. horizontal retrace end and horizontal blanking end), as they're not matching the entire character clock, thus coming short on the higher display resolutions with higher color DAC? E.g. horizontal total is over 2000 pixels, while horizontal display end is 1600, the horizontal retrace start/blanking start being doubled in the same fashion, but the retrace/blanking end being unable to be doubled(due to being, like the VGA) only 5-bit values?