The IOPB was introduced with the 386. What older processors would be supported by disabling it?

Ah. You're right about that. And the related bitmap below it can be disabled by clearing CR4's bit on Pentium-compatible processors (CR4.VME).
So it's actually compatible with the 80386 and below (16-bit (286) TSS have neither, so they assume it's bits are set and interrupts trapping I think (like the field is outside descriptor limits)?).

crazyc wrote on 2024-04-12, 23:42:

The IOPB was introduced with the 386. What older processors would be supported by disabling it?

Oh, my bad. You're right about that. I am wondering about the Interrupt Redirection bitmap in this case.

What happens if IOPB's value minus 32 reaches the IOPB offsets(it's 2 bytes after all) or below? Is that used as-is(reading IOPB or below fields as the IR bitmap) or is the end of the IOPB truncating the limit of the IR bitmap to make the IOPB start after the IOPB always (and past IOPB's value treated as ones)?
This case would happen when the IOPB is at 0x87 and below.

From what I can see in Bochs's v86_redirect_interrupt function (https://sourceforge.net/p/bochs/code/HEAD/tre … s/cpu/vm8086.cc line 203) it doesn't seem to perform any checks, other than a simple limit check?
So you can move the Interrupt Redirection table into the TSS register address space if you want (mapping the registers into it to perform weird hacks)?