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486 cache/ram speed issue with write-back

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Reply 20 of 37, by PC-Engineer

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For the HW hack you need a SRAM similar to the TAG SRAM (e.g. 32k8, DIP28) and solder it on top of the TAG. Connect all adress pins (A0...A14) and the VCC/GND-Pins with the corresponding pins of TAG. The I/O pins and the WE remain open. Then connect pin133 from SiS471 with one of the I/O-pins and pin134 with the WE-pin from the dirty TAG SRAM. Good luck ...

Epox 7KXA Slot A / Athlon 950MHz / Voodoo 5 5500 / PowerVR / 512 MB / AWE32 / SCSI - Windows 98SE

Reply 21 of 37, by BeginnerGuy

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PC-Engineer wrote:

For the HW hack you need a SRAM similar to the TAG SRAM (e.g. 32k8, DIP28) and solder it on top of the TAG. Connect all adress pins (A0...A14) and the VCC/GND-Pins with the corresponding pins of TAG. The I/O pins and the WE remain open. Then connect pin133 from SiS471 with one of the I/O-pins and pin134 with the WE-pin from the dirty TAG SRAM. Good luck ...

That is a seriously interesting fix. Would love to read an explanation but that would be a huge waste of your time I'm sure. Fresh bios is obviously the way to go 😜

--------------------------- Edit nm, I missed that megaherz said he used the latest version of modbin, seems that has to be run from a newer version of windows. Have to play with it on another pc

err. I've tried multiple versions of modbin now on my bios (dumped with nssi) and a fellow users bios for the same board. I get checksum errors on both. Anyone able to open this in modbin? Gigaherz bios opens right up for me, I see his changes to reg 72 and 50 under the chipset regs.

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Reply 22 of 37, by bakemono

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I like datasheets. I think I've been able to enable WB with dirty bits using a DOS program. Check it out...

This board has a voltage regulator and accepts DX4 CPUs natively, so I would assume I'm running at 3.3 or 3.45V, it's not user configurable but the board does mostly everything automatically to my behest (re 5V questions)

I've never heard of a socket 3 board with automatic voltage setting...

(posted from my 486 w/ Win95 and Opera 9...)

Reply 23 of 37, by Disruptor

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bakemono wrote:

I've never heard of a socket 3 board with automatic voltage setting...

My TMC Research Corporation PAT486PG is capable to pick 3.3 / 5 Volt by a pin on the processor.
It does not ignore pin S4 (VOLDET).

However, to switch from AMD/Intel (3.3 Volt) to Cyrix (3.45 Volt) has to be done by a kind of jumper.

Reply 24 of 37, by BeginnerGuy

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it would be pretty odd for this board to have a regulator and support dx4 cpus but have no ability to do 3.3v. i think only one special overdrive model of dx4 ever supported 5v. the cpu barely gets warm and i have a heatsink and fan on it anyway (adz model doesnt require hsf on its own with proper voltage). Been running that way since 2017 no problem. Makes me worry its running at 5v and will kill the cpu though 🙁.

Edit: Tested sis.exe, works perfectly! Thank you bakemono. easy and quick fix for anybody not able to get a bios update, it just flips the necessary bytes in the chipset (I think) and you're off to the races. Main memory speed 37.1 MB/s in cachechk now. I wonder if this can also be done on the necessary byte for L1 WB cache, gonna dig into that tomorrow.

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Reply 25 of 37, by BeginnerGuy

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Any programmers here? I'm curious how the sis.exe posted above works as I'd like to hit another register.. Are the chipset registers in the SiS 471 memory mapped and accessible to an assembly programmer in DOS? They must be somewhere for that program to be working. Would be easier if I knew where to look.

I know the ROM BIOS is at f000:0 - ffff but obviously I can't use that for real time changes.

If it's memory mapped and accessible, enabling write-back would be as simple as ORing the contents of register 50 with 0x10.. If that works I can just write a new program combining everything and have it execute via autoexec.bat ... I haven't had a chance to look at sis.exe in a disassembler yet

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Reply 26 of 37, by bakemono

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As explained in the data sheet, the chipset registers are accessed through port I/O. $22 is the index port and $23 is the data port. The source for SIS.EXE looks like this:

        sectionbss

ff1.d:
resd

derp:
resd 32768
resd 32768

sectiondata

dd 0

sectioncode

callex ,initplatform

beginfunc
localvar x.d,y.d,reg1.d,reg2.d

callex reg1,sisread,$72 > reg1=_ or 6
callex reg2,sisread,$50 > reg2=_ or 8

; flush 256K cache
x=0
whileless x,262144
y=derp.d(x) > x=_+4
wend

callex ,siswrite,$72,reg1 ; set 7+1
callex ,siswrite,$50,reg2 ; set WB

callex x,sisread,$72
callex ,printhexr,x and $FF
callex x,sisread,$50
callex ,printhexr,x and $FF

callex ,printnt,"SiS 471 - L2 write-back, 7+1 tag should be enabled"r.a
endfunc
end

siswrite:
beginfunc regdata.d,regnum.d
asm
mov al,[regnum].b
out $22,al
mov al,[regdata].b
out $23,al
endasm
endfunc
returnex 8

sisread:
beginfunc regnum.d
asm
mov al,[regnum].b
out $22,al
in al,$23
endasm
endfunc
Show last 1 line
        returnex 4

(compiler is here for anyone interested)

I don't know what toggling the L1 writeback bit will do, since on my system it's controlled by the switch on the CPU upgrade chip.

BTW, did you ever try setting JP11 1-2 to get the 4x multiplier you wanted?

Reply 27 of 37, by BeginnerGuy

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Thank you bakemono! Exactly what I needed. I have no idea if it will work either, that's why I want to see what happens before I have a modified bios with that bit toggled burned.

I believe JP11 on 1-2 results in a failure to post, will test that again later but confident I tried it.

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Reply 28 of 37, by GigAHerZ

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Can some of you modify this utility so it takes address and value from command line and so you can switch whatever values? (If it has an effect is another question)
I'm not that proficient in asm myself unfortunately. (C#, in which i work every day, is way-way higher level language and the jump from it is quite long)

"640K ought to be enough for anybody." - And i intend to get every last bit out of it even after loading every damn driver!

Reply 29 of 37, by BeginnerGuy

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GigAHerZ wrote:

Can some of you modify this utility so it takes address and value from command line and so you can switch whatever values? (If it has an effect is another question)
I'm not that proficient in asm myself unfortunately. (C#, in which i work every day, is way-way higher level language and the jump from it is quite long)

Could be done but which registers would you want access to besides what we've already done (out of curiosity)? Also, this could be done in C with a splash of inline assembly, it's not hard to pick up.
I'll do a barebones one soon and post it up.

FYI I just wrote a quick hackjob flip bit 4 of register 50 (verified it works by reading it back out and checking in debugger 0xAB at startup, 0xBB after running) and L1 is still in write-through according to chkcpu, no change in cachechk, so bakemono is right there. What i don't understand is how the chipset supports write-back l1 and the pod83 is supported. Does that CPU have some kind of physical toggle for write-back? I've never heard of that before.

Anyway, was still fun

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Reply 30 of 37, by TheMobRules

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BeginnerGuy wrote:

What i don't understand is how the chipset supports write-back l1 and the pod83 is supported. Does that CPU have some kind of physical toggle for write-back? I've never heard of that before.

In J.Steunebrink's AMD 5x86 page there is a section that provides details on the connections between CPU and chipset pins that are necessary for enabling WB L1. Normally, boards that support WB have some jumpers to connect these pins (although some of them may be handled by the BIOS).

One thing to note, on my SiS471 boards the CACHE# line of the CPU does not get connected to the chipset when enabling WB L1, which is consistent with Steunebrink's comment regarding that signal being optional.

Reply 31 of 37, by BeginnerGuy

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Thank you TheMobRules, working my way through that now and found the am5x86 data sheet from another source (his link to AMD website is dead). I'm still trying to get the CPU to work in X4 mode in general, aside from the cache. Just can't get it working any way besides X3.

Time is limited for tonight but I can say re bakemono that closing pins 1-2 on J11 result in a failure to post (no beeps at all), same if I try 2-3 on J11. According to the above mentioned website, that should have worked 🙁

If you install the raw Am5x86 CPU, but you can't get the Am5x86 jumpers setting from the motherboard or system manufacturer, then start by setting all jumpers as for the Intel 486DX4-100 or, even better, the AMD Enhanced Am486DX4-100. See below for further details.
Clock Multiplier jumper
The CPUs internal clock multiplication factor is controlled by the CLKMUL pin R-17. If this pin is left floating (or connected to +3.3V), both the DX4 and the 5x86 will operate in the clock-tripled mode. To get the Am5x86 in clock-quadrupled mode, this pin has to be grounded . As this would have put a 486DX4 in clock-doubled mode, you have to look for the clock-multiplier jumper and change it from x3 to a x2 setting.

I can try breaking out the multimeter to verify those pins are in fact grounding R-17, but now it's getting tedious 😎

This probably explains it:

In rare cases, the PC will not boot at all because the BIOS regards the CPU signature as invalid. You can identify this problem by placing the Clock Multiplier jumper and the L1 cache WB jumper back to their DX4 positions (x3 resp. WT). With this setting, the Am5x86 will behave exactly like a 486DX4 and the PC should boot and detect the Am5x86 as a DX4.
You will need a BIOS upgrade to solve this problem, or you can stay in clock-tripled mode and operate the Am5x86 as a (fast) DX4-120 by increasing the motherboard clock to 40MHz

Hmmm, I grabbed a bios from another thread for the Freetech F38 motherboard (Bios Hunt: GENOA 486VLG - X4), I think that may be dated late 1995, will check shortly. Does anybody know what model EEPROM I need to flash a fresh bios for this board? Will a 28C512 get the job done? Have to go through another member to get them ready.

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Reply 32 of 37, by feipoa

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Anyone try CTCHIP34? It has support for the SiS 471 chipset and lets you modify various registers. It can also be run from the command line or via a bat file if you already know what modifications you want to make.

Plan your life wisely, you'll be dead before you know it.

Reply 33 of 37, by bakemono

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You can also just go to QBASIC and issue this:

OUT &H22,&H50
? INP(&H23)

The Genoa X4 BIOS is 64KB, so 27512 or equivalent should work.

Reply 34 of 37, by trixster

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Sorry to resurrect an old thread, but @GigAHerZ I have the same motherboard as you and would like to use your modded bios to repalce the bios on my board. Can i ask what programmer you used, and what 28pin DIP chip is required? Or can the bios chip be flashed through DOS?

ok, as the .bin is 64k i'm assuming i can use a TL866ii and either a W27C512 or AT27C512 eeprom 😀

Thanks!

Reply 35 of 37, by trixster

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hmm, ok, i used the TL866ii to flash this to a W27C512 and I get a black screen on boot, even after the cmos is reset. Are there any settings i might need to change in the programmer? Such as Region (default or flash), Start Addr, Load mode?

The mobo is a Soyo SY-25P with original bios Rev .G2.

I was able to use the programmer to upgrade to BIOS Rev .G3. which i found on a different thread here on vogons, so i know the chip and programmer work ok! So wondering why GigAHerZ's modded bios is not booting for me?

Reply 36 of 37, by trixster

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Just thought I’d update the thread to say I got this working correctly on my soyo board after GigAHerZ correctly diagnosed user error by me 😀

His modded bios linked earlier in this thread won’t post on my system for some reason, so I used modbin to modify the G3 bios by altering the chipset registers GigAHerZ noted - 72 and 50. I got this wrong initially and spent many hours scratching my head, but a consultation of the Sis chipset reference showed me my error.

So now L2 WB is working great, and I get identical results to GigAHerZ. Doom sees an immediate increase in performance.

Reply 37 of 37, by trixster

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Hi again,

I’ve installed an SX955 486 DX2-66 which can use L1 in WB mode.

I’ve changed the motherboard jumpers of this SOYO SY-25P from regular 486 to P24D and the machine will post ok and I can enter the bios, however the boot process never gets further than the attached photo unless I disable L2 cache in the bios! With L2 enabled in bios (either in WT or WB) then the booting process hangs before msdos starts to load…. With L2 disabled the machine starts Dos without any issues….!

Any ideas what the problem might be?

I have a VLB vga card and a VLB I/O card in this machine with 2 CF cards running off the I/O card.

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