Reply 20 of 23, by Marco
douglar wrote on Yesterday, 21:03:[*]Switching to a caching ISA controller will do memory mapped transfers instead of PIO transfers which can get you 4MB/s with some latency overhead when accessing data that's not in the cache.
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Sorry to get back on this. Do you have any proof of that memory mapped transfer? I couldn’t find one sign of that 😒 thank you
1) VLSI SCAMP 311 | 386SX25@TI486SXLC2-50@63 | 16MB | CL-GD5434 | CT2830| SCC-1 | MT32 | WDC160GB/7200/8MB | Fast-SCSI AHA 1542CF + BlueSCSI v2/15k U320
2) SIS486 | 486DX/2 66(@80) | 32MB | TGUI9440 | LAPC-I