LSS10999 wrote on 2021-05-19, 06:45:This is about the "system arena" which resides between the 3GB and 4GB ranges. If you have read the article I mentioned before y […]
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Jo22 wrote on 2021-05-19, 05:37:Thanks for the feedback. To err is human and I'm always open to new ideas.
Could you please be so kind and post a link that expl […]
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Caluser2000 wrote on 2021-05-18, 18:20:jo22 in on post you stated the missing 1/2 gig was because of 32-bit Pentium architecture. Now you post more crap that is totall […]
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jo22 in on post you stated the missing 1/2 gig was because of 32-bit Pentium architecture. Now you post more crap that is totally incorrect.
I suggest you don't rely on your memory and go do some reseach on it before post ths stuff. I've you've made quite a few errors in other posts because you have relied on your memory.
If your statements/ramblings were correct other 32-bit OSs would be missing this 1/2gig as well. They do not.
In with a suitable addition to the kernel they can access far more ram.
Thanks for the feedback. To err is human and I'm always open to new ideas.
Could you please be so kind and post a link that explains the matter properly ?
Edit: I took your advice and did some research. However, I wasn't really succesful.
Best I got was a memory layout of the Haswell architecture (left part), which is not a proper representation of a generic PC.
"PCI/PCIe memory range below 4GB—This memory range is only seen from the CPU perspective.
This range is determined by whether the IGD is activated or not. If the IGD is active, this memory range starts at the value of the BGSM register;
otherwise this memory range starts at the value of TOLUD register. The upper limit of this memory range is 4GB-20MB (FEC0_0000h).
Access to this range is forwarded to either the external PCIe graphics via the PCIe 3.0 connection or to the southbridge via the DMI.
PCI/PCIe memory range above 4GB—This memory range is only seen from the CPU perspective.
The value of top of upper usable DRAM (TOUUD) register in the hostbridge determines the start of this memory range.
The value of TOUUD is equal to the value of REMAPLIMIT register plus one. The PMLIMITU register (in the hostbridge) value determines the end of this memory range.
Access to this range is forwarded to either the external PCIe graphics via the PCIe 3.0 connection or to the southbridge via the DMI.
Graphics aperture range—This memory range is seen as part of PCI/PCIe memory range below 4GB in Figure 14.
However, in practice, this memory range may as well reside in the PCI/PCIe memory range above 4GB, depending on the platform firmware and the system configuration.
This memory range is always mapped to the PCI/PCIe memory range. It’s used as contiguous address space or as additional graphics memory space if the graphics memory
in the IGD or external PCIe graphics card is running out. The graphics aperture range in the platform firmware configuration must be enabled for this range to exist.
Otherwise, it doesn’t exist. Memory management for the system memory allocated to serve the graphics aperture uses a graphics translation table just like the legacy AGP aperture.
The difference lies in the possibility that the aperture lies above the 4GB limit and the handling of the graphics aperture memory management.
It’s the responsibility of the OS—specifically the graphics device driver—to carry out memory management for the graphics aperture. [..]
Source: https://resources.infosecinstitute.com/topic/ … -based-systems/
IF.. THEN.. EXCEPT, IF.. Well. This is.. confusing. 😢 I'm not an expert of current technology by any means.
Last time I was into such stuff was when I built an AMD APU E-350 PC.. And that was about ten years ago!
010814_1515_SystemAddre14.png
This is about the "system arena" which resides between the 3GB and 4GB ranges. If you have read the article I mentioned before you should know what exactly is that "4GB limit".
TL;DR: M$ artificially limited the addressable RAM range to less than 4GB since Windows XP SP2 (below PAE). Taking the "system arena" into the account, you'll only get 3-3.5GB usable. Additionally, completely disabling DEP would disable PAE as well (only applies to XP SP2 and SP3), as it becomes totally redundant thanks to this artificial limit.
On the other hand, M$ broke something (HAL, USB stuffs, etc.) to prevent the system from working correctly with more than 4GB RAM available and this in turn justified the reasons behind this new limitation.
Efforts are being made to expand the potential of Windows XP and make it usable on modern hardware (see this very long and active thread on Win-Raid). Among them are patches to remove the 4GB RAM limit (plus fixes/workarounds to known related issues), with daniel_k's patch being the most recent one. Up to 64GB of RAM can be reliably used after patching, though some drivers (notably Asus/C-Media ones) simply BSOD with the RAM limit removed, so your mileage may vary. (NOTE: The same BSODs can occur on Server 2003 as well, which can already access more than 4GB of RAM)
Thank you for your explanation, I just started reading the links you mentioned.
However, I still can't see what was wrong with my early statements.
Even if 32-Bit Windows could access only 3,5GB instead of the full 4GB due to an artificially limited,
does this really matter so much?
The PCI range and video memory/video page frame do still reduce the amount of the RAM below 4GB that otherwise would be theoreticaly available to an OS.
I'm afraid that's there's a problem in communication here.
I didn't mean to say that things are impossible to archive somehow.
The 32-Bit server editions of Windows NT were able to access more than 4GB of memory, for a long time, too. That's what I mentioned before.
Aren't these mechanisms available in the desktop versions of 32-Bit Vista+, too?
I've also said that "pure" 32-Bit OSes do inherent a 4GB limit.
By 32-Bit, I meant software that uses 32-Bit pointers at best. Such as from the 386/486/585 era.
The device drivers that are meant to be compatible with 386-586 PCs,
cannot address more than 4GB, rather less.
(Except if using segmentation; pointer/offset)
If they' tried to, couldn't a address wrap-round or overflow happen at worst?
Since Windows 2000 can run on a 486 PC, still, I assume, the makers of 32-Bit device driver and/or MS were rather conservative in this respect.
Windows XP, can run on Pentium MMX-based machines onwards, which are technically more recent than the Pentium Pro.
However, the Pentium MMX wasn't directly based if the Pentium Pro.
Rather, the later Pentium II was based (?) on Pentium Pro technology.
So I'm not sure if the P MMX can use 36-Bits, aswell.
However, XP can still use Windows 2000 era device drivers meant to work on 486/585 PCs.
Which can mean a risk if they are used with a a recent kernal that uses PAE or any similar technology.
I didn't mean to say that 32-Bit OSes are entirely unable to do use more than 4GB.
Linux did this since the early 2000s.
It can boot off MBR partitions that are located on HDDs bigger that 2TB, even.
Windows, by comparison, demands GPT and UEFI for this.
Edit: Ok, I finished reading.
Some parts reminded me of the pointers used by Windows 3.1 Standard Mode kernal
and the bank-switching mechanisms in MP/M on Z80 platform and EMS on MS-DOS..
"Even kernel-mode drivers don’t need to know anything specific to PAE,
much less be written specially to support it. All that’s required is a general awareness that physical memory addresses may be wider
than 32 bits and that accommodation of this comes naturally from following the documentation. "
^This segment just killed me. 🙄 As if that was not a big deal, at all.
Edit: I've also noticed that DEP was rarely mentioned.
DEP was used to prevent the execution of malicious code.
I mentioned it in an earlier thread, which likely is faulty, too:
Re: Hardware for Win3.11
Could it be, that PAE simply found its way into the XP installation media because it was required for DEP rather than for accessing additional memory?
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