640K!enough wrote on 2022-04-07, 02:59:
Was this still apparent when you were switching between two EEPROM configurations (with IFM bit set/clear)? It could be a software problem, but could also be a separate design issue.
It definitly is and was. I've now played with it a little more (after having received another OPL for another test): so far, it looks like the OPL is always staying active when the IFM is selected and continuously providing MCLK and LCLK to the DAC. With these CLKs alive, but no data on the MDATA, the DAC seems to output a low level noise floor (so, actually in both configurations). With the OPL gone, the faint noise floor goes away, too (which I can do in my hardware setup, since the clocks for the YMF and CS are coming from the MK1420) - funny enough, this wouldn't be possible if I'd have clocked the CS from the YMF (as I am doing for the next planned version).
What's currently still not explained to me is: why does it suddenly get amplified immensely when the switch to the IFM happens and being reduced to almost inaudible levels when the external OPL is selected again (with no observable change on the DAC's Line-Out). Is this a to-be-expected behaviour of the CS4236 / CS4237B (which I both tried to rule out a defective IC, too)?
These are two shots from one of the AOUTs of the DAC, with the OPL3 playing and not playing (please ignore some of the displayed info, it's been the first time and even the first 30 minutes of using this oscilloscope):
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What I am wondering now is: would it be possible to use the YMF289's power-down feature to maybe try and silence this path when the IFM is on (since it only seems to happen with the OPL in place)?
The datasheet shows this:
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What are the thoughts on this - easily doable and sounding reasonable, or pointless and hopeless? 😁