BitWrangler wrote on 2021-12-08, 20:05:

Does it get as far as "Starting MS-DOS..." or whatever message whatever OS put on the bootblock? ... if it goes past that, does EMM386 try to load do you think? or maybe stacker/dblespace even if you just did a sys A: from a system that had them installed and no config.sys or autoexec.bat. (view hidden files and if there's dblspace.sys there or similar then yeah, it did that)

It does not even go so far as to say "starting MS-DOS". It tries to read the diskette for 1 second and displays nothing new on the screen - stays black, except for the boxed POST detail. The floppy drive light stays lit. I tried 3 different floppy controllers, all of which use different chips. I tried different cables and different floppy drives. It is as if the BIOS demands having a 486 inorder to boot floppies. No issues with HDDs though. I've never run into this issue and am at a loss.

Could't be possible that changing CPU with different speed may affect floppy signals timing? Does it boot with different CPU but the same speed?

I've tried 3 different Harris CPUs, all at 8.3 MHz, 12.5 MHz and 16 MHz. It doesn't help the floppy boot issue. As there is no ISA bus divisor on the board, 8.3 MHz s should have worked. This implies to me the issue is unrelated to ISA clock freq.

If you have a digital scope or logic analyser it may be usefull to view and compare some FDD signals timing of working and not-working boot sequence. Just a guess, if FDC/ISA clock is independent on CPU clock there may still be a timing difference if BIOS would use e.g. some delay loop that Harris CPU execute in different time than other CPUs.

I am wondering if it could be a power ripple thing, on the board maybe, where the 286es don't pull quite enough to smooth it out, and it glitches FDC or DMA or something, but the 486 does.

Floppy stuff uses DMA to get data going and that means cache coherency issues when there is no hardware mechanism to deal with it.

Tiido wrote on 2021-12-10, 07:46:

Floppy stuff uses DMA to get data going and that means cache coherency issues when there is no hardware mechanism to deal with it.

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Tiido wrote on 2021-12-10, 07:46:

Floppy stuff uses DMA to get data going and that means cache coherency issues when there is no hardware mechanism to deal with it.

What do you mean by 'cache' in this case? The Harris 80286-16 is without cache, and so is the motherboard. The floppy no-boot issue occurs only when a 286 CPU is installed, and not when the 486 SuperChip is installed.

The board has the original BIOS right? Not a replacement one that depends on 386 code?

yeah, it looks to be original 286 bios.

I should test it with a 5.25" drive to see if the issue persists.

Setting aside the issue with not being able to floppy boot if a 286 CPU is installed, I moved onto the SuperChip's surgery. I was able to remove the SLC-25 with hot air and no physical damage. Here is an image of the PCB traces in case anyone is looking for it at some point.

I applied some TS391AX solder paste as follows,

First time was a charm in this case - no bridges, no mess, no non-contacts.

Here's the setup on the 286 board,

The good news is that the SXLC works on the SuperChip486. The bad news is that when I go to inhibit the cache region, it freezes,

I also tried just using cyrix -i1, but the result was the same - hang. I then tried to first disable L1 with cyrix.exe -e-, then to inhibit the cacheable range with cyrix.exe -i1, but with this order of operation, the whole screen turns black. A real bugger. Deciding to leave the L1 disabled, I then tried to enable clock doubling with cyrix.exe -cd. The L1 mode correctly goes from 2-way to direct-mapped, which indicates that the command registered, but clock doubling did not enable. cachechk.exe indicates the CPU frequency is still at 25 MHz and Landmark's speed test shows the same benchmark before and after trying to enable clock doubling.

I've run into one 386 board which didn't let me enable clock doubling if the FSB was too high, so perhaps there's a similar issue here. I did try to run the FSB at 8 MHz instead of 12.5 MHz, but clock double still did not enable. I guess the SXLC doesn't like the external 2x multiplier on the SuperChip.

I was able to enable L1 just fine with the SLC with cyrix.exe -i1. Perhaps the PAL chips, which were programmed with 1 KB of L1 cache in mind, don't work if there is 8 KB. Since I don't have the DIP switch settings, I am unable to determine if there is a DIP switch which is for use with an SXLC, but I highly doubt there is such a setting. I suppose I could randomly try DIP switch settings, but I doubt there will be any improvement

Out of curiosity, I tried to run the SLC and SXLC with a 13.81 MHz and a 16.25 MHz FSB, but the screen stayed blank at power-up. I guess the PAL PLL can't handle that freq.

Unless someone else has a recommendation, I'll have to solder the SLC back on.

feipoa wrote on 2021-12-10, 19:49:

What do you mean by 'cache' in this case? The Harris 80286-16 is without cache, and so is the motherboard. The floppy no-boot issue occurs only when a 286 CPU is installed, and not when the 486 SuperChip is installed.

I had missed that it wasn't with the upgrade stuff... Then I am not having ideas why it works with one and not the other.

Maybe you need to leave the HDD plugged to power to stabilise the PSU, most AT and many ATX aren't good with less than 10W draw.

BitWrangler wrote on 2021-12-11, 14:48:

Maybe you need to leave the HDD plugged to power to stabilise the PSU, most AT and many ATX aren't good with less than 10W draw.

Wait a second... you might be on to something. Because I lost one of my testbeds to my wife's standing desk platform (a COVID catastrophe), I decided to use an ATX PSU with an AT adapter on my remaining test bed. Obviously this was so that I could test AT and ATX motherboard's without yanking PSU every swap. So besides the power draw, doesn't the ATX have some missing negative voltage plane? I'll pull an AT PSU and retest this evening or the next.

Anybody have any ideas about why the SXLC doesn't work with L1 on this adapter? I haven't desoldered the IC yet, but will do so soon. It is a real stretch, but maybe the SXLC wants the FasMath soldered in as well? I had tried the generic MR BIOS 286 BIOS, but it didn't resolve the issue. The system also hangs when I try to invoke the cache region. Also, MR BIOS seems to have an issue with the board in general; it always thinks the CMOS battery is drained.

I remember that IBM 51x0 motherboards need a load connected when powering up, but I have never heard of this being an issue with clone boards. Did you check the voltage rails on the power supply when the board is connected? I still say that the real issue here is that your board is broken somehow. Can you try a different 286 board?
Don't those TI chips usually have issues doubling when they get dirty signals? Did you check all the filter caps?
There's no way that any of the jumpers on your CPU module are related to TI chips. Wasn't it made in 1991?

Regrettably, I have but one 286 board. I had tossed my old 286 system around 1999, but kept the I/O card and Oak graphics card. Opps!

I tried with a proper AT power supply, and with a mechanical HDD load, but still cannot boot from 1.44M floppies when using a 286. Unfortunately, I only have Harris 286 chips to try.

I am not sure if the TI chips cannot double when the clock signal is dirty or not. I remember looking at the clock signal on my AMI Mark V Baby Screamer motherboard w/SXL2-66, but didn't see any obvious ripple or noise that was dissimilar from other boards. Perhaps it's there, but I didn't see it. Maybe the issue is more related to a phase shift in the clock signal rather than noise.

I checked the tantalum caps, 8 of them, around the 50 MHz oscillator and the 14.318 MHz oscillator, but all I can say is that none of them are shorted.

I tried to boot from a 1.2MB 5.25" drive, but the symptoms were the same as the 1.44M drive - the floppy keeps spinning with the light on, but no sound of heads and screen stays at the POST screen.

The DIP switch settings have no effect on any of the cyrix.exe register settings - I flipped them all. It is likely that the PAL's control mostly the cache invalidation. Using Landmark v2 with the SLC, the BARB invalidation method showed 59 MHz, while the FLUSH method showed 76 MHz. This implies that FLUSH is working and that there is some kind of invalidation circuit on the SuperChip's PCB. However, I don't understand why all the CPU settings, like BARB, FLUSH, A20 input, cacheable range, etc. are all disabled by default. I'd have thought the PALs would be enabling some of these register settings. I guess Evergreen was relying on software to get it going, rather than DIP switch settings.

Is Gotek emulator working ?
I am 99% sure it was fine on this board, but that was 3 years ago, so 99% is every 1 out of 10.

I will have to check the Gotek. However, I've run across another hurtle. Even if I have a simple Harris 12 Mhz CPU installed, and I'm at the C:\ prompt, the system will hang after a few minutes of idle [at the C prompt]. No idea what could cause this, but I suspect whatever is causing it is also causing the floppy drive issue. Is there some kind of power saving time-out deal going on?

Maybe changing the crystal to match the 486 frequency?
25 x 2

I recognize that hanging pattern very well.
On these fast VLSI boards it happens with memory modules that cannot handle 0 ws properly.