…Show last 356 lines
6100:08:07:73.03504: Registers:
6200:08:07:73.03504: EAX: 00000001, EBX: 000014cb, ECX: 00000000, EDX: 00000030
6300:08:07:73.03536: CS: 0020, DS: 0F96, ES: 0F96, FS: 0000, GS: 0000 SS: 14CB, TR: 0000, LDTR:0000
6400:08:07:73.03536: ESP: 00009e40, EBP: 00000008, ESI: 00000120, EDI: 00000910
6500:08:07:73.03536: EIP: 0000022c, EFLAGS: 00003002
6600:08:07:73.03568: CR0: 00000001; CR1: 00000000; CR2: 00000000; CR3: 00000000
6700:08:07:73.03568: CR4: 00000000; CR5: 00000000; CR6: 00000000; CR7: 00000000
6800:08:07:73.03568: DR0: 00000000; DR1: 00000000; DR2: 00000000; CR3: 00000000
6900:08:07:73.03600: DR6: 00000000; DR5&7: 00000000
7000:08:07:73.03600: GDTR: 00000000FA80FFFF, IDTR: 00000000F9800100
7100:08:07:73.03632: FLAGSINFO:c1p0a0zstido11n0rv00000000000000
7200:08:07:73.03632: Interrupt status: 0000000000000000
7300:08:07:73.03632: VGA@572,48(CRT:599,82)
7400:08:07:73.03632: Display=801,446
75
7600:08:07:73.09456: Reading from RAM: 0000FAA8=FF (ÿ)
7700:08:07:73.09456: Reading from RAM: 0000FAA9=FF (ÿ)
7800:08:07:73.09456: Reading from RAM: 0000FAAA=B0 (°)
7900:08:07:73.09456: Reading from RAM: 0000FAAB=4C (L)
8000:08:07:73.09456: Reading from RAM: 0000FAAC=01 ()
8100:08:07:73.09456: Reading from RAM: 0000FAAD=93 (“)
8200:08:07:73.09488: Reading from RAM: 0000FAAE=00 ( )
8300:08:07:73.09488: Reading from RAM: 0000FAAF=00 ( )
8400:08:07:73.09488: 0020:0000022F (8ED0)MOVW SS,AX
8500:08:07:73.09520: EU&BIU cycles: 2, Operation cycles: 0, HW interrupt cycles: 0, Prefix cycles: 0, Exception cycles: 0, MMU read cycles: 0, MMU write cycles: 0, I/O bus cycles: 0, Prefetching cycles: 0, BIU prefetching cycles: 0
8600:08:07:73.09520: Registers:
8700:08:07:73.09552: EAX: 00000028, EBX: 000014cb, ECX: 00000000, EDX: 00000030
8800:08:07:73.09552: CS: 0020, DS: 0F96, ES: 0F96, FS: 0000, GS: 0000 SS: 14CB, TR: 0000, LDTR:0000
8900:08:07:73.09552: ESP: 00009e40, EBP: 00000008, ESI: 00000120, EDI: 00000910
9000:08:07:73.09552: EIP: 0000022f, EFLAGS: 00003002
9100:08:07:73.09584: CR0: 00000001; CR1: 00000000; CR2: 00000000; CR3: 00000000
9200:08:07:73.09584: CR4: 00000000; CR5: 00000000; CR6: 00000000; CR7: 00000000
9300:08:07:73.09584: DR0: 00000000; DR1: 00000000; DR2: 00000000; CR3: 00000000
9400:08:07:73.09584: DR6: 00000000; DR5&7: 00000000
9500:08:07:73.09616: GDTR: 00000000FA80FFFF, IDTR: 00000000F9800100
9600:08:07:73.09616: FLAGSINFO:c1p0a0zstido11n0rv00000000000000
9700:08:07:73.09616: Interrupt status: 0000000000000000
9800:08:07:73.09616: VGA@596,48(CRT:623,82)
9900:08:07:73.09616: Display=801,446
100
10100:08:07:73.09648: Reading from RAM: 0000FB95=D8 (Ø)
10200:08:07:73.09648: 0020:00000231 (B81000)MOVW AX, 0010
10300:08:07:73.09680: EU&BIU cycles: 5, Operation cycles: 4, HW interrupt cycles: 0, Prefix cycles: 0, Exception cycles: 0, MMU read cycles: 0, MMU write cycles: 0, I/O bus cycles: 0, Prefetching cycles: 4, BIU prefetching cycles: 3
10400:08:07:73.09680: Registers:
10500:08:07:73.09680: EAX: 00000028, EBX: 000014cb, ECX: 00000000, EDX: 00000030
10600:08:07:73.09680: CS: 0020, DS: 0F96, ES: 0F96, FS: 0000, GS: 0000 SS: 0028, TR: 0000, LDTR:0000
10700:08:07:73.09680: ESP: 00009e40, EBP: 00000008, ESI: 00000120, EDI: 00000910
10800:08:07:73.09680: EIP: 00000231, EFLAGS: 00003002
10900:08:07:73.09712: CR0: 00000001; CR1: 00000000; CR2: 00000000; CR3: 00000000
11000:08:07:73.09712: CR4: 00000000; CR5: 00000000; CR6: 00000000; CR7: 00000000
11100:08:07:73.09712: DR0: 00000000; DR1: 00000000; DR2: 00000000; CR3: 00000000
11200:08:07:73.09712: DR6: 00000000; DR5&7: 00000000
11300:08:07:73.09712: GDTR: 00000000FA80FFFF, IDTR: 00000000F9800100
11400:08:07:73.09744: FLAGSINFO:c1p0a0zstido11n0rv00000000000000
11500:08:07:73.09744: Interrupt status: 0000000000000000
11600:08:07:73.09744: VGA@605,48(CRT:632,82)
11700:08:07:73.09744: Display=801,446
118
11900:08:07:73.09744: Reading from RAM: 0000FA90=FF (ÿ)
12000:08:07:73.09744: Reading from RAM: 0000FA91=FF (ÿ)
12100:08:07:73.09744: Reading from RAM: 0000FA92=60 (`)
12200:08:07:73.09744: Reading from RAM: 0000FA93=F9 (ù)
12300:08:07:73.09776: Reading from RAM: 0000FA94=00 ( )
12400:08:07:73.09776: Reading from RAM: 0000FA95=93 (“)
12500:08:07:73.09776: Reading from RAM: 0000FA96=00 ( )
12600:08:07:73.09776: Reading from RAM: 0000FA97=00 ( )
12700:08:07:73.09776: 0020:00000234 (8ED8)MOVW DS,AX
12800:08:07:73.09808: EU&BIU cycles: 2, Operation cycles: 0, HW interrupt cycles: 0, Prefix cycles: 0, Exception cycles: 0, MMU read cycles: 0, MMU write cycles: 0, I/O bus cycles: 0, Prefetching cycles: 0, BIU prefetching cycles: 0
12900:08:07:73.09808: Registers:
13000:08:07:73.09808: EAX: 00000010, EBX: 000014cb, ECX: 00000000, EDX: 00000030
13100:08:07:73.09808: CS: 0020, DS: 0F96, ES: 0F96, FS: 0000, GS: 0000 SS: 0028, TR: 0000, LDTR:0000
13200:08:07:73.09808: ESP: 00009e40, EBP: 00000008, ESI: 00000120, EDI: 00000910
13300:08:07:73.09840: EIP: 00000234, EFLAGS: 00003002
13400:08:07:73.09840: CR0: 00000001; CR1: 00000000; CR2: 00000000; CR3: 00000000
13500:08:07:73.09840: CR4: 00000000; CR5: 00000000; CR6: 00000000; CR7: 00000000
13600:08:07:73.09840: DR0: 00000000; DR1: 00000000; DR2: 00000000; CR3: 00000000
13700:08:07:73.09840: DR6: 00000000; DR5&7: 00000000
13800:08:07:73.09840: GDTR: 00000000FA80FFFF, IDTR: 00000000F9800100
13900:08:07:73.09872: FLAGSINFO:c1p0a0zstido11n0rv00000000000000
14000:08:07:73.09872: Interrupt status: 0000000000000000
14100:08:07:73.09872: VGA@629,48(CRT:656,82)
14200:08:07:73.09872: Display=801,446
143
14400:08:07:73.09872: Reading from RAM: 0000FB96=33 (3)
14500:08:07:73.09872: Reading from RAM: 0000FB97=C9 (É)
14600:08:07:73.09872: Reading from RAM: 0000FB98=66 (f)
14700:08:07:73.09904: 0020:00000236 (33C9)XORW CX,CX
14800:08:07:73.09904: EU&BIU cycles: 11, Operation cycles: 3, HW interrupt cycles: 0, Prefix cycles: 0, Exception cycles: 0, MMU read cycles: 0, MMU write cycles: 0, I/O bus cycles: 0, Prefetching cycles: 12, BIU prefetching cycles: 3
14900:08:07:73.09904: Registers:
15000:08:07:73.09904: EAX: 00000010, EBX: 000014cb, ECX: 00000000, EDX: 00000030
15100:08:07:73.09968: CS: 0020, DS: 0010, ES: 0F96, FS: 0000, GS: 0000 SS: 0028, TR: 0000, LDTR:0000
15200:08:07:73.09968: ESP: 00009e40, EBP: 00000008, ESI: 00000120, EDI: 00000910
15300:08:07:73.09968: EIP: 00000236, EFLAGS: 00003002
15400:08:07:73.09968: CR0: 00000001; CR1: 00000000; CR2: 00000000; CR3: 00000000
15500:08:07:73.09968: CR4: 00000000; CR5: 00000000; CR6: 00000000; CR7: 00000000
15600:08:07:74.00000: DR0: 00000000; DR1: 00000000; DR2: 00000000; CR3: 00000000
15700:08:07:74.00000: DR6: 00000000; DR5&7: 00000000
15800:08:07:74.00000: GDTR: 00000000FA80FFFF, IDTR: 00000000F9800100
15900:08:07:74.00000: FLAGSINFO:c1p0a0zstido11n0rv00000000000000
16000:08:07:74.00000: Interrupt status: 0000000000000000
16100:08:07:74.00000: VGA@638,48(CRT:665,82)
16200:08:07:74.00000: Display=801,446
163
16400:08:07:74.00032: Reading from RAM: 0000FB99=33 (3)
16500:08:07:74.00032: Reading from RAM: 0000FB9A=FF (ÿ)
16600:08:07:74.00064: Reading from RAM: 0000FB9B=BA (º)
16700:08:07:74.00096: 0020:00000238 (6633FF)XORD EDI,EDI
16800:08:07:74.00128: EU&BIU cycles: 11, Operation cycles: 3, HW interrupt cycles: 0, Prefix cycles: 2, Exception cycles: 0, MMU read cycles: 0, MMU write cycles: 0, I/O bus cycles: 0, Prefetching cycles: 12, BIU prefetching cycles: 3
16900:08:07:74.00128: Registers:
17000:08:07:74.00128: EAX: 00000010, EBX: 000014cb, ECX: 00000000, EDX: 00000030
17100:08:07:74.00128: CS: 0020, DS: 0010, ES: 0F96, FS: 0000, GS: 0000 SS: 0028, TR: 0000, LDTR:0000
17200:08:07:74.00128: ESP: 00009e40, EBP: 00000008, ESI: 00000120, EDI: 00000910
17300:08:07:74.00128: EIP: 00000238, EFLAGS: 00003046
17400:08:07:74.00160: CR0: 00000001; CR1: 00000000; CR2: 00000000; CR3: 00000000
17500:08:07:74.00160: CR4: 00000000; CR5: 00000000; CR6: 00000000; CR7: 00000000
17600:08:07:74.00160: DR0: 00000000; DR1: 00000000; DR2: 00000000; CR3: 00000000
17700:08:07:74.00160: DR6: 00000000; DR5&7: 00000000
17800:08:07:74.00160: GDTR: 00000000FA80FFFF, IDTR: 00000000F9800100
17900:08:07:74.00160: FLAGSINFO:c1P0a0Zstido11n0rv00000000000000
18000:08:07:74.00192: Interrupt status: 0000000000000000
18100:08:07:74.00192: VGA@690,48(CRT:717,82)
18200:08:07:74.00192: Display=801,446
183
18400:08:07:74.00192: Reading from RAM: 0000FB9C=18 ()
18500:08:07:74.00192: Reading from RAM: 0000FB9D=00 ( )
18600:08:07:74.00192: Reading from RAM: 0000FB9E=8E (Ž)
18700:08:07:74.00192: 0020:0000023B (BA1800)MOVW DX, 0018
18800:08:07:74.00224: EU&BIU cycles: 13, Operation cycles: 4, HW interrupt cycles: 0, Prefix cycles: 0, Exception cycles: 0, MMU read cycles: 0, MMU write cycles: 0, I/O bus cycles: 0, Prefetching cycles: 12, BIU prefetching cycles: 3
18900:08:07:74.00224: Registers:
19000:08:07:74.00224: EAX: 00000010, EBX: 000014cb, ECX: 00000000, EDX: 00000030
19100:08:07:74.00256: CS: 0020, DS: 0010, ES: 0F96, FS: 0000, GS: 0000 SS: 0028, TR: 0000, LDTR:0000
19200:08:07:74.00256: ESP: 00009e40, EBP: 00000008, ESI: 00000120, EDI: 00000000
19300:08:07:74.00256: EIP: 0000023b, EFLAGS: 00003046
19400:08:07:74.00256: CR0: 00000001; CR1: 00000000; CR2: 00000000; CR3: 00000000
19500:08:07:74.00256: CR4: 00000000; CR5: 00000000; CR6: 00000000; CR7: 00000000
19600:08:07:74.00256: DR0: 00000000; DR1: 00000000; DR2: 00000000; CR3: 00000000
19700:08:07:74.00288: DR6: 00000000; DR5&7: 00000000
19800:08:07:74.00288: GDTR: 00000000FA80FFFF, IDTR: 00000000F9800100
19900:08:07:74.00288: FLAGSINFO:c1P0a0Zstido11n0rv00000000000000
20000:08:07:74.00288: Interrupt status: 0000000000000000
20100:08:07:74.00288: VGA@742,48(CRT:769,82)
20200:08:07:74.00288: Display=801,446
203
20400:08:07:74.00320: Reading from RAM: 0000FB9F=C2 (Â)
20500:08:07:74.00320: Reading from RAM: 0000FA98=FF (ÿ)
20600:08:07:74.00320: Reading from RAM: 0000FA99=FF (ÿ)
20700:08:07:74.00320: Reading from RAM: 0000FA9A=00 ( )
20800:08:07:74.00320: Reading from RAM: 0000FA9B=00 ( )
20900:08:07:74.00320: Reading from RAM: 0000FA9C=10 ()
21000:08:07:74.00320: Reading from RAM: 0000FA9D=93 (“)
21100:08:07:74.00320: Reading from RAM: 0000FA9E=00 ( )
21200:08:07:74.00352: Reading from RAM: 0000FA9F=00 ( )
21300:08:07:74.00352: 0020:0000023E (8EC2)MOVW ES,DX
21400:08:07:74.00352: EU&BIU cycles: 6, Operation cycles: 0, HW interrupt cycles: 0, Prefix cycles: 0, Exception cycles: 0, MMU read cycles: 0, MMU write cycles: 0, I/O bus cycles: 0, Prefetching cycles: 4, BIU prefetching cycles: 0
21500:08:07:74.00352: Registers:
21600:08:07:74.00384: EAX: 00000010, EBX: 000014cb, ECX: 00000000, EDX: 00000018
21700:08:07:74.00384: CS: 0020, DS: 0010, ES: 0F96, FS: 0000, GS: 0000 SS: 0028, TR: 0000, LDTR:0000
21800:08:07:74.00384: ESP: 00009e40, EBP: 00000008, ESI: 00000120, EDI: 00000000
21900:08:07:74.00384: EIP: 0000023e, EFLAGS: 00003046
22000:08:07:74.00384: CR0: 00000001; CR1: 00000000; CR2: 00000000; CR3: 00000000
22100:08:07:74.00416: CR4: 00000000; CR5: 00000000; CR6: 00000000; CR7: 00000000
22200:08:07:74.00416: DR0: 00000000; DR1: 00000000; DR2: 00000000; CR3: 00000000
22300:08:07:74.00416: DR6: 00000000; DR5&7: 00000000
22400:08:07:74.00416: GDTR: 00000000FA80FFFF, IDTR: 00000000F9800100
22500:08:07:74.00416: FLAGSINFO:c1P0a0Zstido11n0rv00000000000000
22600:08:07:74.00416: Interrupt status: 0000000000000000
22700:08:07:74.00448: VGA@803,49(CRT:0,83)
22800:08:07:74.00448: Display=801,446
229
23000:08:07:74.00448: Reading from RAM: 0000FBA0=66 (f)
23100:08:07:74.00448: Reading from RAM: 0000FBA1=26 (&)
23200:08:07:74.00448: Reading from RAM: 0000FBA2=8B (‹)
23300:08:07:74.00480: Reading from RAM: 0000FBA3=15 ()
23400:08:07:74.00480: Reading from RAM: 0000FBA4=66 (f)
23500:08:07:74.00480: Reading from RAM: 0000FBA5=B8 (¸)
23600:08:07:74.00480: Reading from RAM: 0000FBA6=00 ( )
23700:08:07:74.00480: Reading from RAM: 0000FBA7=00 ( )
23800:08:07:74.00480: Reading from RAM: 000A0000=00 ( )
23900:08:07:74.00480: Read from memory: 00100000=00 ( )
24000:08:07:74.00512: Reading from RAM: 000A0001=00 ( )
24100:08:07:74.00512: Read from memory: 00100001=00 ( )
24200:08:07:74.00512: Reading from RAM: 000A0002=00 ( )
24300:08:07:74.00512: Read from memory: 00100002=00 ( )
24400:08:07:74.00512: Reading from RAM: 000A0003=00 ( )
24500:08:07:74.00512: Read from memory: 00100003=00 ( )
24600:08:07:74.00544: ModR/M address: 0018:0000B866
24700:08:07:74.00544: 0020:00000240 (66268B1566B80000)MOVD EDX,[ES:0000B866]
24800:08:07:74.00576: EU&BIU cycles: 34, Operation cycles: 2, HW interrupt cycles: 0, Prefix cycles: 4, Exception cycles: 0, MMU read cycles: 0, MMU write cycles: 0, I/O bus cycles: 0, Prefetching cycles: 32, BIU prefetching cycles: 0
24900:08:07:74.00576: Registers:
25000:08:07:74.00576: EAX: 00000010, EBX: 000014cb, ECX: 00000000, EDX: 00000018
25100:08:07:74.00576: CS: 0020, DS: 0010, ES: 0018, FS: 0000, GS: 0000 SS: 0028, TR: 0000, LDTR:0000
25200:08:07:74.00576: ESP: 00009e40, EBP: 00000008, ESI: 00000120, EDI: 00000000
25300:08:07:74.00576: EIP: 00000240, EFLAGS: 00003046
25400:08:07:74.00608: CR0: 00000001; CR1: 00000000; CR2: 00000000; CR3: 00000000
25500:08:07:74.00608: CR4: 00000000; CR5: 00000000; CR6: 00000000; CR7: 00000000
25600:08:07:74.00608: DR0: 00000000; DR1: 00000000; DR2: 00000000; CR3: 00000000
25700:08:07:74.00608: DR6: 00000000; DR5&7: 00000000
25800:08:07:74.00608: GDTR: 00000000FA80FFFF, IDTR: 00000000F9800100
25900:08:07:74.00608: FLAGSINFO:c1P0a0Zstido11n0rv00000000000000
26000:08:07:74.00640: Interrupt status: 0000000000000000
26100:08:07:74.00640: VGA@832,49(CRT:0,83)
26200:08:07:74.00640: Display=801,446
263
26400:08:07:74.00640: Reading from RAM: 0000FBA8=00 ( )
26500:08:07:74.00640: Reading from RAM: 0000FBA9=00 ( )
26600:08:07:74.00640: Reading from RAM: 00010F4B=EB (ë)
26700:08:07:74.00672: Read from memory: 00010F4B=EB (ë)
26800:08:07:74.00672: Reading from RAM: 0000FBAA=66 (f)
26900:08:07:74.00672: Reading from RAM: 0000FBAB=26 (&)
27000:08:07:74.00672: Writing to memory: 00010F4B=FB (û)
27100:08:07:74.00672: Writing to RAM: 00010F4B=FB (û)
27200:08:07:74.00672: ModR/M address: 0010:000015EB
27300:08:07:74.00672: 0020:00000248 (0000)ADDB [DS:BX+SI],AL
27400:08:07:74.00704: EU&BIU cycles: 23, Operation cycles: 25, HW interrupt cycles: 0, Prefix cycles: 0, Exception cycles: 0, MMU read cycles: 4, MMU write cycles: 4, I/O bus cycles: 0, Prefetching cycles: 16, BIU prefetching cycles: 6
27500:08:07:74.00704: Registers:
27600:08:07:74.00704: EAX: 00000010, EBX: 000014cb, ECX: 00000000, EDX: 00000000
27700:08:07:74.00736: CS: 0020, DS: 0010, ES: 0018, FS: 0000, GS: 0000 SS: 0028, TR: 0000, LDTR:0000
27800:08:07:74.00736: ESP: 00009e40, EBP: 00000008, ESI: 00000120, EDI: 00000000
27900:08:07:74.00736: EIP: 00000248, EFLAGS: 00003046
28000:08:07:74.00736: CR0: 00000001; CR1: 00000000; CR2: 00000000; CR3: 00000000
28100:08:07:74.00736: CR4: 00000000; CR5: 00000000; CR6: 00000000; CR7: 00000000
28200:08:07:74.00736: DR0: 00000000; DR1: 00000000; DR2: 00000000; CR3: 00000000
28300:08:07:74.00768: DR6: 00000000; DR5&7: 00000000
28400:08:07:74.00768: GDTR: 00000000FA80FFFF, IDTR: 00000000F9800100
28500:08:07:74.00768: FLAGSINFO:c1P0a0Zstido11n0rv00000000000000
28600:08:07:74.00768: Interrupt status: 0000000000000000
28700:08:07:74.00768: VGA@92,49(CRT:119,83)
28800:08:07:74.00768: Display=801,446
289
29000:08:07:74.00800: Reading from RAM: 0000FBAC=89 (‰)
29100:08:07:74.00800: Reading from RAM: 0000FBAD=05 ()
29200:08:07:74.00800: Reading from RAM: 0000FBAE=66 (f)
29300:08:07:74.00800: Reading from RAM: 0000FBAF=26 (&)
29400:08:07:74.00800: Reading from RAM: 0000FBB0=8B (‹)
29500:08:07:74.00800: Reading from RAM: 0000FBB1=05 ()
29600:08:07:74.00832: Writing to memory: 00100000=10 ()
29700:08:07:74.00832: Writing to RAM: 000A0000=10 ()
29800:08:07:74.00832: Writing to memory: 00100001=00 ( )
29900:08:07:74.00832: Writing to RAM: 000A0001=00 ( )
30000:08:07:74.00832: Writing to memory: 00100002=00 ( )
30100:08:07:74.00832: Writing to RAM: 000A0002=00 ( )
30200:08:07:74.00864: Writing to memory: 00100003=00 ( )
30300:08:07:74.00864: Writing to RAM: 000A0003=00 ( )
30400:08:07:74.00864: ModR/M address: 0018:058B2666
30500:08:07:74.00864: 0020:0000024A (6626890566268B05)MOVD [ES:058B2666],EAX
30600:08:07:74.00896: EU&BIU cycles: 26, Operation cycles: 2, HW interrupt cycles: 0, Prefix cycles: 4, Exception cycles: 0, MMU read cycles: 0, MMU write cycles: 0, I/O bus cycles: 0, Prefetching cycles: 24, BIU prefetching cycles: 0
30700:08:07:74.00896: Registers:
30800:08:07:74.00896: EAX: 00000010, EBX: 000014cb, ECX: 00000000, EDX: 00000000
30900:08:07:74.00896: CS: 0020, DS: 0010, ES: 0018, FS: 0000, GS: 0000 SS: 0028, TR: 0000, LDTR:0000
31000:08:07:74.00896: ESP: 00009e40, EBP: 00000008, ESI: 00000120, EDI: 00000000
31100:08:07:74.00928: EIP: 0000024a, EFLAGS: 00003082
31200:08:07:74.00928: CR0: 00000001; CR1: 00000000; CR2: 00000000; CR3: 00000000
31300:08:07:74.00928: CR4: 00000000; CR5: 00000000; CR6: 00000000; CR7: 00000000
31400:08:07:74.00928: DR0: 00000000; DR1: 00000000; DR2: 00000000; CR3: 00000000
31500:08:07:74.00928: DR6: 00000000; DR5&7: 00000000
31600:08:07:74.00928: GDTR: 00000000FA80FFFF, IDTR: 00000000F9800100
31700:08:07:74.00960: FLAGSINFO:c1p0a0zStido11n0rv00000000000000
31800:08:07:74.00960: Interrupt status: 0000000000000000
31900:08:07:74.00960: VGA@201,49(CRT:228,83)
32000:08:07:74.00960: Display=801,446
321
32200:08:07:74.00960: Reading from RAM: 0000FBB2=66 (f)
32300:08:07:74.00960: Reading from RAM: 0000FBB3=26 (&)
32400:08:07:74.00992: Reading from RAM: 0000FBB4=89 (‰)
32500:08:07:74.00992: Reading from RAM: 0000FBB5=15 ()
32600:08:07:74.00992: Reading from RAM: 0000FBB6=66 (f)
32700:08:07:74.00992: Reading from RAM: 0000FBB7=3D (=)
32800:08:07:74.00992: Reading from RAM: 0000FBB8=FF (ÿ)
32900:08:07:74.00992: Reading from RAM: 0000FBB9=FF (ÿ)
33000:08:07:74.01024: Writing to memory: 00100000=00 ( )
33100:08:07:74.01024: Writing to RAM: 000A0000=00 ( )
33200:08:07:74.01024: Writing to memory: 00100001=00 ( )
33300:08:07:74.01024: Writing to RAM: 000A0001=00 ( )
33400:08:07:74.01024: Writing to memory: 00100002=00 ( )
33500:08:07:74.01056: Writing to RAM: 000A0002=00 ( )
33600:08:07:74.01056: Writing to memory: 00100003=00 ( )
33700:08:07:74.01056: Writing to RAM: 000A0003=00 ( )
33800:08:07:74.01056: ModR/M address: 0018:FFFF3D66
33900:08:07:74.01056: 0020:00000252 (66268915663DFFFF)MOVD [ES:FFFF3D66],EDX
34000:08:07:74.01088: EU&BIU cycles: 34, Operation cycles: 2, HW interrupt cycles: 0, Prefix cycles: 4, Exception cycles: 0, MMU read cycles: 0, MMU write cycles: 0, I/O bus cycles: 0, Prefetching cycles: 32, BIU prefetching cycles: 0
34100:08:07:74.01088: Registers:
34200:08:07:74.01088: EAX: 00000010, EBX: 000014cb, ECX: 00000000, EDX: 00000000
34300:08:07:74.01120: CS: 0020, DS: 0010, ES: 0018, FS: 0000, GS: 0000 SS: 0028, TR: 0000, LDTR:0000
34400:08:07:74.01120: ESP: 00009e40, EBP: 00000008, ESI: 00000120, EDI: 00000000
34500:08:07:74.01120: EIP: 00000252, EFLAGS: 00003082
34600:08:07:74.01120: CR0: 00000001; CR1: 00000000; CR2: 00000000; CR3: 00000000
34700:08:07:74.01120: CR4: 00000000; CR5: 00000000; CR6: 00000000; CR7: 00000000
34800:08:07:74.01152: DR0: 00000000; DR1: 00000000; DR2: 00000000; CR3: 00000000
34900:08:07:74.01152: DR6: 00000000; DR5&7: 00000000
35000:08:07:74.01152: GDTR: 00000000FA80FFFF, IDTR: 00000000F9800100
35100:08:07:74.01152: FLAGSINFO:c1p0a0zStido11n0rv00000000000000
35200:08:07:74.01152: Interrupt status: 0000000000000000
35300:08:07:74.01152: VGA@323,49(CRT:350,83)
35400:08:07:74.01152: Display=801,446
355
35600:08:07:74.01184: Reading from RAM: 0000FBBA=FF (ÿ)
35700:08:07:74.01184: Reading from RAM: 0000FBBB=FF (ÿ)
35800:08:07:74.01184: Reading from RAM: 0000F9B0=65 (e)
35900:08:07:74.01184: Reading from RAM: 0000F9B1=02 ()
36000:08:07:74.01184: Reading from RAM: 0000F9B2=20 ( )
36100:08:07:74.01184: Reading from RAM: 0000F9B3=00 ( )
36200:08:07:74.01216: Reading from RAM: 0000F9B4=00 ( )
36300:08:07:74.01216: Reading from RAM: 0000F9B5=87 (‡)
36400:08:07:74.01216: Reading from RAM: 0000F9B6=00 ( )
36500:08:07:74.01216: Reading from RAM: 0000F9B7=00 ( )
36600:08:07:74.01216: Reading from RAM: 0000FAA0=FF (ÿ)
36700:08:07:74.01216: Reading from RAM: 0000FAA1=FF (ÿ)
36800:08:07:74.01216: Reading from RAM: 0000FAA2=60 (`)
36900:08:07:74.01216: Reading from RAM: 0000FAA3=F9 (ù)
37000:08:07:74.01216: Reading from RAM: 0000FAA4=00 ( )
37100:08:07:74.01248: Reading from RAM: 0000FAA5=9B (›)
37200:08:07:74.01248: Reading from RAM: 0000FAA6=00 ( )
37300:08:07:74.01248: Reading from RAM: 0000FAA7=00 ( )
37400:08:07:74.02144: Reading from RAM: 0000FBC5=8D ()
37500:08:07:74.02400: Reading from RAM: 0000FBC6=36 (6)
37600:08:07:74.02400: Reading from RAM: 0000FBC7=10 ()
37700:08:07:74.02400: Reading from RAM: 0000FBC8=00 ( )
37800:08:07:74.02400: Reading from RAM: 0000FBC9=2E (.)
37900:08:07:74.02432: Reading from RAM: 0000FBCA=0F ()
38000:08:07:74.02432: Reading from RAM: 0000FBCB=01 ()
38100:08:07:74.02432: Reading from RAM: 0000FBCC=54 (T)
38200:08:07:74.02432: Reading from RAM: 0000FBCD=08 ()
38300:08:07:74.02432: Reading from RAM: 0000FBCE=B8 (¸)
38400:08:07:74.02432: Reading from RAM: 0000FBCF=08 ()
38500:08:07:74.02432: Reading from RAM: 0000FBD0=00 ( )
38600:08:07:74.02432: Reading from RAM: 0000FBD1=8E (Ž)
38700:08:07:74.02464: Writing to memory: 0001EAEE=82 (‚)
38800:08:07:74.02464: Writing to RAM: 0001EAEE=82 (‚)
38900:08:07:74.02464: Writing to memory: 0001EAEF=30 (0)
39000:08:07:74.02464: Writing to RAM: 0001EAEF=30 (0)
39100:08:07:74.02464: Writing to memory: 0001EAEC=20 ( )
39200:08:07:74.02464: Writing to RAM: 0001EAEC=20 ( )
39300:08:07:74.02464: Writing to memory: 0001EAED=00 ( )
39400:08:07:74.02464: Writing to RAM: 0001EAED=00 ( )
39500:08:07:74.02496: Writing to memory: 0001EAEA=5A (Z)
39600:08:07:74.02496: Writing to RAM: 0001EAEA=5A (Z)
39700:08:07:74.02496: Writing to memory: 0001EAEB=02 ()
39800:08:07:74.02496: Writing to RAM: 0001EAEB=02 ()
39900:08:07:74.02528: 0020:0000025A (FFFF)<NECV20/V30+ #UD(Possible cause:<UNKNOWN Opcode: GRP5(w) /7>)>
40000:08:07:74.02560: EU&BIU cycles: 60, Operation cycles: 51, HW interrupt cycles: 61, Prefix cycles: 0, Exception cycles: 0, MMU read cycles: 0, MMU write cycles: 12, I/O bus cycles: 0, Prefetching cycles: 60, BIU prefetching cycles: 39
40100:08:07:74.02560: Registers:
40200:08:07:74.02560: EAX: 00000010, EBX: 000014cb, ECX: 00000000, EDX: 00000000
40300:08:07:74.02560: CS: 0020, DS: 0010, ES: 0018, FS: 0000, GS: 0000 SS: 0028, TR: 0000, LDTR:0000
40400:08:07:74.02592: ESP: 00009e40, EBP: 00000008, ESI: 00000120, EDI: 00000000
40500:08:07:74.02592: EIP: 0000025a, EFLAGS: 00003082
40600:08:07:74.02592: CR0: 00000001; CR1: 00000000; CR2: 00000000; CR3: 00000000
40700:08:07:74.02592: CR4: 00000000; CR5: 00000000; CR6: 00000000; CR7: 00000000
40800:08:07:74.02592: DR0: 00000000; DR1: 00000000; DR2: 00000000; CR3: 00000000
40900:08:07:74.02592: DR6: 00000000; DR5&7: 00000000
41000:08:07:74.02624: GDTR: 00000000FA80FFFF, IDTR: 00000000F9800100
41100:08:07:74.02624: FLAGSINFO:c1p0a0zStido11n0rv00000000000000
41200:08:07:74.02624: Interrupt status: 0000000000000000
41300:08:07:74.02624: VGA@484,49(CRT:511,83)
41400:08:07:74.02624: Display=801,446
415