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List of VLB IDE Controllers

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Reply 221 of 278, by mockingbird

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Intel486dx33 wrote on 2024-03-26, 02:18:

Which are the Best VLB cards ?
that work with hard drives larger than 420mb and have the fastest performance ?

Promise PDC20630. HDD size support depends on your BIOS.

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Reply 222 of 278, by douglar

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mockingbird wrote on 2024-03-26, 02:21:
Intel486dx33 wrote on 2024-03-26, 02:18:

Which are the Best VLB cards ?
that work with hard drives larger than 420mb and have the fastest performance ?

Promise PDC20630. HDD size support depends on your BIOS.

The best performance can depend on the xfer modes supported by your storage device and the driver/bios used.

I got the best performance on synthetic benchmarks with a promise 20630 using the last promise DOS driver in WDMA mode speed 8 with a storage device that supported WDMA, but WDMA mode wasn’t supported by sata devices on a sata/pata bridge. What is the max capacity on the last promise driver? 128GB or was it smaller than that?

I got results pretty close to the PDC20630 on a PDC20230c with XUB and an msata device on a sata/pata bridge with no capacity limits. Seems like Xtide universal bios has some very good PIO support for the 20230c.

Buslogic BT-410a / Tekram DC-680C can reach some very impressive numbers when it is running out of the cache, but there are a number of drive capacity/addressing concerns to consider with those caching controllers.

Reply 223 of 278, by mkarcher

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douglar wrote on 2024-03-26, 03:08:

Buslogic BT-410a / Tekram DC-680C can reach some very impressive numbers when it is running out of the cache, but there are a number of drive capacity/addressing concerns to consider with those caching controllers.

Impressive numbers when running out of cache, true. But atrocious numbers on cache misses. While I don't have expertise on the DC-680C, the predecessor DC-680T operated the drive-to-cache interface at PIO0, regardless of VLB clock, configuration or drive capabilities. The Menu of the DC-680T can show all the drive capabilities, even with very old firmware, but that does not mean that any of these capabilities are used, though.

Reply 224 of 278, by douglar

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I found this link while reading through the comments on the OS/2 Museum article about SCSI vs IDE. I'll have to get this info merged into my list. There's some new chips that I've never heard of before, a lot of programming info, and references to some drivers that we don't have on Vogons drivers yet.

https://web.archive.org/web/20030919200343/ht … lbidechips.html

Reply 225 of 278, by douglar

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So this link suggests that the later 486 ALI chipsets had a VLB IDE interface:
https://web.archive.org/web/20030919200343/ht … lbidechips.html

The retroweb was kind enough to host a data sheet:
https://theretroweb.com/chip/documentation/m1 … cc190749081.pdf

It says: Built in IDE Controller

  • Dedicated IDE pins, concurrent with PCI bus
  • 4x32 bits Read-Ahead buffer and Write-Post buffer support
  • Supports through ATA PIO mode 3, 4 harddisk

"Concurrent with PCI bus" ? That's kind of vague, yes?. Sure makes it sound like it's almost but not quite PCI. Anyway, doesn't seem like anyone ever make add-in boards out of those chips, so I'll consider them out of scope.

Here's a curiosity-- Seems like SIS produced their controllers in this order: SIS83C611 (1993) and then defying expectations, SIS83C601 (1995) came out later.

Here are the two that I have:

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Sis wasn't the only manufacturer to come out with with new silicon fabbed in the first few weeks on 1995. I'll have to add "first fabbed" week to my chart.

Reply 226 of 278, by rasz_pl

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douglar wrote on 2024-04-04, 11:56:

https://theretroweb.com/chip/documentation/m1 … cc190749081.pdf

"Concurrent with PCI bus" ? That's kind of vague, yes?. Sure makes it sound like it's almost but not quite PCI.

page 5 shows it hanging off memory bus
page 30: "high speed local bus IDE controller"
page 31: 16 bytes in 16 bytes out fifo
Page 143: can program PIO mode 4 timings

https://github.com/raszpl/FIC-486-GAC-2-Cache-Module for AT&T Globalyst
https://github.com/raszpl/386RC-16 memory board
https://github.com/raszpl/440BX Reference Design adapted to Kicad
https://github.com/raszpl/Zenith_ZBIOS MFM-300 Monitor

Reply 227 of 278, by mkarcher

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douglar wrote on 2024-04-04, 11:56:
It says: Built in IDE Controller […]
Show full quote

It says: Built in IDE Controller

  • Dedicated IDE pins, concurrent with PCI bus
  • 4x32 bits Read-Ahead buffer and Write-Post buffer support
  • Supports through ATA PIO mode 3, 4 harddisk

"Concurrent with PCI bus" ? That's kind of vague, yes?. Sure makes it sound like it's almost but not quite PCI. Anyway, doesn't seem like anyone ever make add-in boards out of those chips, so I'll consider them out of scope.

"Concurrent with PCI bus" means that the IDE data pins are not shared with the PCI bus address/data pins, so pre-fetching and write-posting can happen concurrently, i.e. at the same time as an unrelated data transfer over the PCI bus. The idea is that the PCI transfers (possibly bus-master transfers by a network card) can happen while the IDE controller chip is pre-fetching or write-posting IDE data over the IDE cable.

This is different to how ISA IDE interface cards work: They just forward the ISA data signals to the IDE cable and vice versa.

Reply 228 of 278, by pshipkov

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ah, the elusive sis 601.
will be interesting to see what it shows.

Mkarcher (and others), i thought that concurrent PCI is default implementation for VL controllers.
Anyone aware of chips that dont follow that ?
Cannot think of a way to inspect that from the outside, empirically.

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Reply 229 of 278, by mkarcher

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pshipkov wrote on 2024-04-04, 20:45:

Mkarcher (and others), i thought that concurrent PCI is default implementation for VL controllers.

The data sheet does not describe a VL IDE controller chip, though. Instead, it describes an integrated chip containing the memory controller, the cache controller and the PCI host bridge. For this kind of "all-in-one"-chips, pin count is often an issue, so sharing pins is not unheard of. Sharing IDE and PCI can work if you put 74F244-type buffers between the PCI signals and the IDE lines. If ALi advertises that their all-in-one chip (except ISA) does not share PCI pins with IDE pins, this indicates that most likely some competitor did.

Reply 231 of 278, by douglar

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Is the VIA VT83C561 chip a PCI IDE controller or is it a VLB IDE controller?

I have not found any add-in boards that use the chip.

Here is a motherboard where it is used:
https://theretroweb.com/motherboards/s/mitac- … 4500am#expchips

Edit:

After looking at the below document, I have to think that the VIA VT83C561 is PCI

https://theretroweb.com/motherboard/manual/pe … da611080081.pdf

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Reply 232 of 278, by dionb

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Just obtained one for the list:

Tekram TRM680C controller. Works in DOS, has BIOS and is found on the Tekram DC-680C caching IDE/floppy controller, together with a Harris 286-20 and 4x 30p SIMM. This thing must have cost an arm and a leg back in 1994...

Reply 233 of 278, by douglar

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dionb wrote on 2024-04-05, 12:29:

Just obtained one for the list:

Tekram TRM680C controller. Works in DOS, has BIOS and is found on the Tekram DC-680C caching IDE/floppy controller, together with a Harris 286-20 and 4x 30p SIMM. This thing must have cost an arm and a leg back in 1994...

This one? http://vogonsdrivers.com/getfile.php?fileid=2 … menustate=60,59

The one with the third IDE header that isn't cached for ATAPI devices?

What ROM version do you have?

Reply 234 of 278, by dionb

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douglar wrote on 2024-04-05, 13:01:
This one? http://vogonsdrivers.com/getfile.php?fileid=2 … menustate=60,59 […]
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dionb wrote on 2024-04-05, 12:29:

Just obtained one for the list:

Tekram TRM680C controller. Works in DOS, has BIOS and is found on the Tekram DC-680C caching IDE/floppy controller, together with a Harris 286-20 and 4x 30p SIMM. This thing must have cost an arm and a leg back in 1994...

This one? http://vogonsdrivers.com/getfile.php?fileid=2 … menustate=60,59

The one with the third IDE header that isn't cached for ATAPI devices?

What ROM version do you have?

No, my DC-680C only has two IDE headers that look cached. Will check the ROM version when I get home.

Edit:
It's Rev 2.05 as well

Edit2:
Dumped the ROM, did fc.exe and it seems to be different to the Buslogic BT-410a. I'll upload it to Vogonsdrivers too. And done

Reply 235 of 278, by mkarcher

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douglar wrote on 2024-04-05, 13:01:
dionb wrote on 2024-04-05, 12:29:

Just obtained one for the list:

Tekram TRM680C controller. Works in DOS, has BIOS and is found on the Tekram DC-680C caching IDE/floppy controller, together with a Harris 286-20 and 4x 30p SIMM. This thing must have cost an arm and a leg back in 1994...

The one with the third IDE header that isn't cached for ATAPI devices?

The one with the third IDE header (for CD support) is called Tekram DC-680CD, not just DC-680C. As far as I know, those two controllers are otherwise identical.

Reply 237 of 278, by GL1zdA

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mkarcher wrote on 2024-04-04, 21:02:

(...) If ALi advertises that their all-in-one chip (except ISA) does not share PCI pins with IDE pins, this indicates that most likely some competitor did.

I think it was the SiS 496/497 that shared the pins, at least to what was reported here. I only have a 2 page "note" for this chipset and the diagram shows IDE going to a bus between the chipset and PCI. Not sure about the UMC UM8881/UM8886 chipset, it looks like it has something VLB like, but couldn't find more information about how it interacts with PCI.

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Reply 238 of 278, by pshipkov

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Not sure this is a factor that actually affects the SiS 496/497 onboard local storage controller performance.
Most SiS 496/497 based boards vary from intermediate to excellent IDE performance.
It is much better than UMC UM8881/UM8886 based ones in general.
It takes a good VLB IDE or late pci udma-66 or higher card to outdo it.

Alaris Cougar II is hopelessly slow motherboard, but the onboard IDE is pretty good, yet the best it can do as part of this mobo is meet SiS 496/497 at the lower end.
Wonder why Michal used it for comparison …

retro bits and bytes

Reply 239 of 278, by dionb

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pshipkov wrote on 2024-04-06, 02:56:

The cached transfer speed of BT-410A is epic.
Non-cached speed is the deep opposite.
Another caching paper tiger, but i admit these complex assemblies are quite interesting.

One of my (many...) long term project ideas is to do some benchmarks of a couple of cached controllers (and the fake cache Hornet VL-230 😜 ) vs uncached, and to do that with a number of different storage devices (very old&slow HDD, CF card and something truly fast) and on some different systems (386DX-16 to Pentium 133 with 32b VLB, and a 486SLC2 with 16b VLB). My suspicion is that with period correct (i.e. old & slow) storage these things will turn out to actually be pretty useful and our 'paper tiger' opinion is vs much faster storage which would not have been available when they were new. But that would take a lot of time I don't have, so for now it's just an idea.