I try you suggest to keep chasing the basics. You already started well by testing the usual stuff (operating voltage, clock, reset). Then, you observed that you don't observe cycles on the ISA bus. You also observed that this likely is not the root cause of the current issue, because you also don't observe cycles on the local bus (aka frontside bus or processor bus). Do you have equipment to check whether you get absolutely no cycles on the local bus or maybe a single cycle after reset? Typically, you would check stuff like that using an oscilloscope in "normal" (see footnote 1) or "single-shot" triggering mode. You can observe whether the 486 triggers a bus cycle by looking at /ADS. The signal is pulled low for a single clock if a cycle starts. We expect some bus cycles to fetch BIOS instructions after the internal reset of the 486 is complete. This is a fully internal operation and does not require a working mainboard, just a working processor. As I understand it, your processors can be treated as "known good", so if you don't see an /ADS response to reset (if an internal selft test is requested, it might take a human perceptable delay (more than 20ms) between releaing reset and getting the first /ADS pulse), you need to troubleshoot why the 486 processor is prevented from starting the BIOS fetch. The most likely reason for not starting the BIOS fetch is that the 486 doesn't know its OK to access the bus. So check HOLD, AHOLD, /BOFF pins. Note that AHOLD and HOLD are active high, so you need HOLD=low, AHOLD=low, /BOFF=high for the 486 to have full bus ownership.
Your observation regarding A13 is also interesting. There are multiple ways why A13 might end up at 1.76V as measured by a multimeter: The pin might be floating, there might be a bus conflict with one party driving it high and another party driving it low, or it might acutally be toggling between high and low. For the moment, I'm going to ignore the "toggling" reason (if your meter has a low-voltage AC range, you might want to use that to check for an AC component at that location). As the local bus is a bus, it is a valid state of that bus if a line is not driven by any participant on the bus. There is no hard requirement that every address line has a pull-up resistor, so seeing 1.76V on A13 by itself is not necessarily a hint that something is wrong on this line. On the other hand, I see that your board is equipped with 256K of L2 cache. In that case, the local bus A2..A17 lines (thus including A13!) need to be forwarded to the cache chips. This can either be a direct connection, or there may be buffer chips in between. On your board, the location of U24 and U25 make it likely that those chips, which provide 16 unidirectional buffers, may be used as address buffer. Those chips are 74F244, the "F" notifying a fast chip with a TTL-like input, which behaves like an internal pull-up. If the 74F244 is connected to A13, and you see 1.76V on that line, something is pulling it down. 74F type logic provides enough pull-up action, that a 1K pull-down might not be able to pull lower than 1.76V.
So, my suggestion for continuing is:
- Verify HOLD, AHOLD, /BOFF while the system is running
- Probe for connectivity from A13 at the 486 socket to the L2 cache (either some address pin of the cache or some input pin of either 74F244)
- Probe for shorts between A13 and other signals.
1: If you are an oscilloscope noob, be aware that the triggering mode called "normal" is not the standard operating mode used in the last 40 years. The default triggering mode is "auto", and "normal" is an exception. If you have a really cheap scope (<50$ AliExpress) that does not provide a trigger mode setting at all, it will behave like "auto" triggering, not like "normal" triggering.
