in theory, maybe? the actual interesting part is GCLKIN at Re: The thing no one asked for: KICAD 440bx reference schematic
on 815 Clockgen makes GSP clock, separate PCI clock, and separate 66MHz clocks (ICH_3V66 GMCH_3V66) going to ICH and GMCH (815 chipset itself).
815 doesnt have explicit AGP clock input or output. AGP connector clock pin is supplied with AGPCLK_CONN signal generated by same Clockgen chip. All three 66MHz output pins are from same synced source, just buffered separately.
on 440BX my guess is Intel noticed clockgen makers wont be able to supply enough chips, or maybe wanted to make it easier for mobo makers so tehy can use any standard legacy clock gen chip, anyway intel decided to produce 66MHz clock internally in the chipset
GCLKIN - I - AGP Clock In: The GCLKIN input is a feedback reference from the GCLKOUT signal.
GCLKO - O - AGP Clock Out: The frequency is 66 MHz. The GCLKOUT output is used to feed
both the reference input pin on the 82443BX and the AGP compliant device.
https://theretroweb.com/chip/documentation/82 … 13.pdf#page=114
AGP slot is clocked by GCLKOUT. Its _very possible_ GCLKOUT is fed by entirely separate clock source block not connected internally AT ALL to anything, and 440BX gets its AGP clock from GCLKIN.
Now the good news is Intel insists manufacturers dont just link those two balls deep under the chip, but extract both out and buffer both with 22 ohm resistors to terminate any undesirable clock bounces, plus
'Note** Please make the GCLKIN trace length 3.3" more than the GCLKOUT recommended trace length'
So in theory one could do an experiment:
-cut GCLKOUT connection at the terminating 22 ohm resistors
-wire spare PCI clock there
if this works and boots up then 440BX AGP can be clocked externally by whatever clock you want.
edit: as for PCI frequency - no idea how 440BX internally generates that 66MHz AGP clock, does it do it from PCI clock? from FSB? you would have to probe AGP pin 6 while playing with PCI clock. Maybe its as simple as having clockgen capable of fsb/4. Now that I think about it clock doubling PCI is the obvious easiest choice. So maybe it is just a matter of replacing clockgen for one doing fsb/4
