SetMul - Multiplier control for VIA C3 / AMD K6 Mobile / Cyrix 5x86

[gerwin]

This is for DOS or Windows 9X. Before asking questions, please check if it is already covered in the documentation below. For people without any VIA C3 or K6-2+ / K6-III+ processor: it may still be useful for disabling L1 cache and for getting some CPU information.

StMul121.zip

SetMul 1.21 program and textfile (V1.2 + V1.2a + V1.1 + v1.0 download counter: 583)

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SetMul v1.21 - Multiplier control for VIA C3, AMD K6 Mobile and Cyrix 5x86
G. Broers 2014-2017 - Free for non-profit use.

DESCRIPTION
The main purpose of this program is to quickly change the multiplier of VIA C3
and AMD K6 Mobile x86 processors in MS-DOS and Windows 9X. It will display the
multiplier and resulting speed. In addition it can enable and disable processor
L1 and L2 cache.

BACKGROUND
Many DOS game and programs have issues with a CPU speed higher then expected,
while other software benefits from increased CPU speed. Having a means to
adjust the processor speed is important for making a system suitable for a
broad range of vintage software.
Originally a classic Pentium processor multiplier was set through jumpers,
without any means to adjust this through software. Around 2000 came a line of
'mobile' processors specifically aimed for laptops, which had a new feature to
preserve battery life when idle:
-Intel called this feature (Enhanced) SpeedStep.
-AMD called this feature PowerNow!
-VIA/Centaur called this feature Longhaul, but later renamed it to PowerSaver.
In all cases it is about temporarily decreasing the processor multiplier by
software. The resulting net processor speed is the Front Side Bus speed times
the selected multiplier. For example: 66 MHz FSB times 5.5 = 366 MHz.

MULTIPLIER OPTIONS
This table shows the available options for each supported processor:
VIA C3 Samuel 1: 3.0x to 8.0x, 11 choices
VIA C3 Samuel 2 step 0: 3.0x to 8.0x, 11 choices
VIA C3 Samuel 2 step 1+: 3.0x to 12.0x, 16 choices
VIA C3 Ezra: 3.0x to 12.0x, 16 choices
VIA C3 Ezra-T: 3.0x to 16.0x, 27 choices
VIA C3 Nehemiah: 4.0x to 16.0x, 25 choices
AMD K6-2+ / K6-III+: 2.0x to 6.0x, 8 choices (2.5x is excluded)
Cyrix 5x86 1.0x to jumpered multiplier (being 2, 3 or 4), 2 choices
A VIA C3 may, or may not work reliably at a total core speed below 250MHz.

BUILD-IN CACHE OPTIONS
Disabling L1 Cache makes a processor very slow, at least half the processing
speed is cut. Disabling L2 Cache also slows the net speed, but has far less
impact.
SetMul allows disabling the L1 cache on any x86 processor from the 486 onwards.
SetMul allows disabling the L2 cache on the K6 Mobile and VIA C3. Note that
the C3 Samuel 1 has no L2 cache.
Contrary to many other cache disabling tools it still works when EMM386 or
Windows 9X are loaded.

PARAMETERS
/? - default help screen.
[Multiplier] - as a single digit like '5', or '5.0', or halves like '5.5'.
L1D - L1 Cache Disable.
L1E - L1 Cache Enable.
L2D - L2 Cache Disable.
L2E - L2 Cache Enable.
ICD - L1 I-Cache Disable, on VIA C3. (I-Cache is half the total L1)
ICE - L1 I-Cache Enable, on VIA C3. (I-Cache is half the total L1)
BPD - Branch Prediction Disable, on VIA C3.
BPE - Branch Prediction Enable, on VIA C3.

Multiple commands can be passed at once.

Running SetMul on a K6 mobile / VIA C3 without parameters gives the current
speed. It will also give the multiplier range and parameters that apply.

Also supported are 4 or 5 wide raw bit patterns: like '1010b' or '01010b'. But
these values are not checked for support, and allow for faulty register input!

OPERATING SYSTEM COMPATIBILITY
-Compatible with MS-DOS, both with and without EMM386 loaded.
-Compatible with Windows 95, 98 and ME.
-SetMul requires CWSDPMI.exe or a compatible DPMI host.
-SetMul sets up a Ring0 exploit to get privileged access to the CPU registers.
-Windows NT/2K/XP/Vista/7/8 or later cannot be fooled,
these systems are not supported.

DISCLAIMER
Use SetMul at your own risk! The author takes no responsibility for loss
of data or damage to hardware through the use of this software.
This program is for vintage hardware hobby use only. It has not been
sufficiently tested to be used while simultaneously working on important data.

ALTERNATIVES
C3Mul for DOS, all functionality retained in SetMul. Relies on CWSDPR0.exe.
WCPUID for Windows (works with Samuel 1, does not work with Ezra-T)
CrystalCPUID for Windows (Does not work with Samuel 1, works with Ezra-T)
K6DOS config.sys Driver for DOS, and K6Speed for windows.
AMD K6 Central Tweaking Unit 'CTU', for Windows.
http://falcosoft.hu/ has DOS-based multiplier tools for AMD Athlon etc.

NEW SINCE UPDATE v1.1 of 20-05-2014
-Fixed protection fault when running SetMul on a 486 system
-K6-2+/III+ : Exclusively toggle L1 cache: parameters L1DX / L1EX
-Pentium Pro/2/3 toggle L2 cache: parameters L2D / L2E
-Winchip C6 toggle I-cache: parameters ICD / ICE
-Pentium P54C test register "TR12" options. Parameters:
BPD - Disable Branch Prediction
VPD - Disable V Pipeline
L1DX - Disable L1 cache exclusively
CCD - Disable L1 code cache
DCD - Disable L1 data cache
PFE - Pentium Features Enable; Resets the above TR12 options to default.
The status of register TR12 cannnot be read by design.

NEW SINCE UPDATE v1.2 of 08-07-2015
-Cyrix 5x86 support.
It can switch between the jumpered startup multiplier and 1.0x and back.

Some intended functions do not work, despite following the datasheet by the letter.
Like Multiplier readout, and Half-speed enable/disable (Parameter HSE and HSD).
Half-speed may only come to effect in idle mode of the CPU. Regardless,
these options remain in the program for now.

-Recompiled, seems to have fixed protection fault in v1.2A

NEW SINCE UPDATE v1.21 of 22-2-2017
-Shows the bootup multiplier of the Pentium Pro, II and III. (Cannot change it).

DEVELOPMENT LOG
03-2014 - Initial release 1.0, based on the C3Mul source:
-Replaced the external ASM file with inline routines (get_vendor_id + get_cpuid)
-Changed text messages, more info is written to screen.
-Replaced Nehemiah+Ezra-T PowerSaver routines with longhaul-v2 from CrystalCPUID.
-New format of multiplier setting table.
-Read back of multiplier from MSR with separate Read back table.
-Added windows 98 detection. EDIT: Changed to NT detection.
-Added K6 Mobile support. Added L2 cache size detection.
-Verified to set and read back properly on: Samuel1+Samuel2+Ezra-T+Nehemiah
and K6-2+ (on all settings).
-Added Ring0 LDT Call Gate system. Now also works with default CWSDPMI and in
Windows 9X.
-Added L1 Cache Disable/Enable, for any 486+.
-Added L2 Cache Disable/Enable, for supported CPUs.
-Parameter handling now unaffected by the order in which parameters are passed.
-Text highlight through console text colors.
-Rewrote IRQ masking in Ring 0 Assembly, now assumes the existing
IRQ-0 timer setting is practical: by default it has the smallest 55ms interval.
-Now does CPUID and MHz calculation for any Pentium-class or later.

CREDITS
Author: G. Broers
http://members.quicknet.nl/lm.broers/

Credits to the original C3MUL author, 2001/4/28, for Samuel and Ezra
http://blue.ribbon.to/~als4kmaniac/i2/

Credits to CrystalCPUID by hiyohiyo.
For the longhaul_v2 and part of the Powersaver routines.

Credits to RayeR for the idea on Ring0 access through DJGPP.

[5u3]

SetMul allows disabling the L2 cache on the K6 Mobile and VIA C3.

Awesome! Thank you for that!

[gerwin]

You're welcome.

Most of the SetMul functionality is for the VIA C3. But the user base for this series of processors is very small. We had a discussion about it here: Cyrix III (i.e. VIA C3) for vintage gaming?. Not all things there reflect my recent experience with VIA C3. Which goes like this:

The C3 is a further development of the Winchip, with VendorID 'CentaurHauls'. With the right slotket any VIA C3 processor ran on all four of the i440BX based boards that I tried, from Aopen, Gigabyte, Soyo and Shuttle. The right slotket being the 'MS-6905 Master' for any C3, and the 'Upgradeware Slot-T' for any Tualatin socket version: Ezra-T and Nehemiah.
All VIA C3s ignore the normal Intel multiplier jumper signals, but they do support software adjustment. Later C3s have bridges on the CPU package that can be modded to some degree, to change the default multiplier.

The VIA C3 Samuel 1, Samuel 2, Ezra and Ezra-T are quite similar. I could not get their cache and memory throughput up to Intel level. I don't know why that is. This is about the fastest of this first series, on a GA-6BXC board, LFB write combining enabled:
VIA C3 Ezra-T (C5N) at 9.0x133=1200MHz:
-Speedsys=626,28 pts.
-Quake I - 640x480=38,1 FPS.
-PC Player Bench=50,5 FPS.
With certain caches disabled it does make a good 286/386/486/586 emulator. On a BX, We did not have that before.
Edit: Benchmarks by Kamerat, and some compatibility tests

The next and final C3 version behaves differently, it makes the previous versions seem unfinished. Cache and memory throughput are sufficient now:
VIA C3 Nehemiah (C5XL) at 9.0x133=1200MHz:
-Speedsys=793,93 pts.
-Quake I - 640x480=71,5 FPS.
-PC Player Bench=106,4 FPS.
This version is not as good in 486 emulation though; It does up to a 486DX-40 at most. Still it does better in that regard then the Intel Pentium II/IIIs.

VIA C3 Nehemiah (C5XL)

C5XL_normal.gif (9.56 KiB) Viewed 14588 times

[bjt]

Great work, thanks for releasing this!

I tested it with my K6-3+ last night. With a 2x multiplier and 66Mhz bus Speedsys rates it as a P133.

I was hoping that disabling the caches too would give me something slower than a 386-40 but interestingly multiplier doesn't seem to make any difference to the Speedsys score with both caches disabled.

Also, I noticed a difference in Speedsys score when disabling both caches through the BIOS as compared to disabling them using SetMul.

L1 & L2 disabled through BIOS = ~10
L1 & L2 disabled through SetMul = ~19

Perhaps the BIOS disables both L2 & L3, whereas SetMul only disables L2?

[Mau1wurf1977]

L1 & L2 disabled through BIOS = ~10
L1 & L2 disabled through SetMul = ~19

That's very interesting indeed!

I have to check this out one day and see what performance points you can hit with a SS7 machine

[Gona]

Great job! Thank you very much!

[gerwin]

Great work, thanks for releasing this!
I tested it with my K6-3+ last night. With a 2x multiplier and 66Mhz bus Speedsys rates it as a P133.
I was hoping that disabling the caches too would give me something slower than a 386-40 but interestingly multiplier doesn't seem to make any difference to the Speedsys score with both caches disabled.
Also, I noticed a difference in Speedsys score when disabling both caches through the BIOS as compared to disabling them using SetMul.
L1 & L2 disabled through BIOS = ~10
L1 & L2 disabled through SetMul = ~19
Perhaps the BIOS disables both L2 & L3, whereas SetMul only disables L2?

When you use an AMD K6 with on-Die L2 cache, the motherboard external cache changes from L2 to L3. I found that when I disable the L1 cache, the L2 seems to become non-functional too. Giving me 20,87 points in Speedsys at 2.0x60=120MHz. This is with the L3 cache still working. If the L3 prevents the system from getting slow enough you should try with the external cache disabled in the BIOS. SetMul only toggles CPU on-Die cache. I don't know what the resulting speed will be.

When left without sufficient cache, data must travel to and from RAM all the time: the FSB speed becomes even more important then it already was, while the clock multiplier matters less. Unfortuntely I do not have much success in changing the FSB speed on an ALi Aladdin V board without reboot. The ALi Southbridge is not well supported, while for i440BX boards there are several tools to do just that (SoftFSB, SetFSB, CPUFSB, RayeR's SMB for DOS).

In Speedsys you can see the raised memory speed ranges in the lower right graph. The three different levels indicate that L1+L2+L3 cache is at work there. One can see what size these caches have, even without reading the text in the graph.

K6-2+ at 2.0x60=120MHz on CT-5RSA0 (ALi Aladdin V)

K6-2+_2x60.gif (10.65 KiB) Viewed 14539 times

[bjt]

If the L3 prevents the system from getting slow enough you should try with the external cache disabled in the BIOS. SetMul only toggles CPU on-Die cache. I don't know what the resulting speed will be.

That explains my results. I got a SpeedSys rating of ~10 with all caches disabled, regardless of multiplier. This is roughly equivalent to a 386-40. I'll have to try one of those software FSB programs to see if I can slow things down further (TX chipset).

[gerwin]

Just so you know, If the FSB software is not written for both a particular Southbridge and a particular PLL clock generator chip, it won't do anything. And usually all FSB options of the PLL are already available through jumpers or the BIOS.

Regarding Socket 7 slowdown in general: The Cyrix 6x86L, using a 1.0x multiplier / 60MHz / no caches, still scores 10,84 in Speedsys. Now that you mentioned it, It seems hard to get below the 10 points on Socket 7.

[carlostex]

Just so you know, If the FSB software is not written for both a particular Southbridge and a particular PLL clock generator chip, it won't do anything. And usually all FSB options of the PLL are already available through jumpers or the BIOS.

FSB change through software for Super Socket 7 would be awesome. I understand it's a complicated task though.

[gerwin]

Some EPoX MVP3 socket 7 boards are supported by SoftFSB, to name something. You can find it in the file SoftFSB.dat.

Just checked the VIA C3 Nehemiah with the SetMul options for Cache and such, and setting FSB speeds from 50 to 133MHz. Lowest SpeedSys score I could get is 3,77 points (~386SX-20), this could be ramped up gradually to 14,46 points (~486DX-40). When enabling all L1 cache again it jumps to 127,30 points at least.
I could also use Throttle to get even lower Speedsys scores on that machine. But that ACPI slowdown method does not always work well with games.

[Jolaes76]

hello gerwin,

could we mirror your version of Ali V Throttle and SetMul10 at K6plus.com ? It would be nice to have these in the utilities section...

[gerwin]

Yes, no problem. This place you mean: K6Plus.com Utilities Section

Though maybe you better wait a little bit, as I have SetMul version 1.1 ready. Just that the readme needs to be updated.
- AMD K6: Exclusively disable L1 cache, leaving L2 functional
- Pentium P54C test register options. (wished intel retained this on the Pentium MMX and the pentium II/III...)
- Disable L2 cache on a Pentium II/III
- Little support for Winchip C6
- Fixed protection fault when running it on a 486 system


I did not mention the modified Throttle in this topic before, so I will do that now:
Throttle for ALi Aladdin 5 Socket 7 boards.

[Jolaes76]

Thanks a lot!

that is great news, let us know when you have finished the SetMul v1.1 package.
I will send the Ali V Throttle to the site admin in the meantime.

These utils definitely should be hosted at vogonsdrivers by as well. IMHO their usefulness is comparable to SoftMPU only (among recent developments for time machines)

[gerwin]

Thanks for the appreciation.

v1.1 is available. See section "NEW SINCE UPDATE v1.1" in the readme.

I wanted to add better CPUID support detection too. But that requires a custom error handler and I have no good DJGPP example of how to do this, yet.

[Jolaes76]

Given the the target CPUs work, it is only a cosmestic issue, I suppose...
One thing I do not get:

Fixed protection fault when running SetMul on a 486 system

how could one run Socket 7 or later processors on a Socket 3 board ? Or is it just precaution for dizzy midnight time-travellers who left the KVM switch on the wrong position...?

[gerwin]

I fixed it because I wanted SetMul to disable the L1 cache on my 486. That and programs crashing is never a nice thing, If possible it should at least give a message like '...not supported'.

[Jolaes76]

doh.
That did not cross my mind... So the utility can be useful as a replacement of ICE and ICD, which work in real mode only.

[bjt]

Thanks for this latest version. I'm using it to enable/disable L1 cache on my 486 DX4-75 laptop, which doesn't have cache control options in the BIOS. I'm seeing slow 486 (SX25 or SX33) performance with L1 disabled.

[gerwin]

Since this week a Cyrix 5x86 100GP S1R3 was added to my inventory. The CPU is working fine in a cheap 486 VLB motherboard, with a modded BIOS. The CPU can be jumpered for multiplier 2.0x or 3.0x.
I have modified SetMul to tinker with the multiplier options which are mentioned in the 5x86 Datasheet. The good news is that one can toggle between the bootup multiplier and 1.0x anytime, but seemingly that is about all it can do. It won't do any switching between 2.0x, 3.0x or 4.0x. There is no observed effect of the half clock speed bit.
Will release it once I add a proper CPU detection routine for this one. If someone wants to try something I would be happy to mail it the way it is now.