Seems like you managed to completely disable L2 cache.

CPU performance and L1 cache parformance are just like every system with an Am5x86 at 4 x 40 MHZ. Nothing special at all.

majestyk wrote on 2024-07-05, 13:01:

Seems like you managed to completely disable L2 cache.

CPU performance and L1 cache parformance are just like every system with an Am5x86 at 4 x 40 MHZ. Nothing special at all.

Yes, L1 CPU cache performace is based on nominal CPU frequency and has to be similar in all tests with the same CPU. But memory bandwidth is more complex. Look on my first post again and try think more about it. BIOS claims "Enhanced Write Back Cache", not "L2 cache disabled". Look on the cache test patterns and latency. L2 cant be disabled. Just only EDO is faster than fast. Thats why you cant see usual drop between L2 and DRAM in perf. graph. Be sure, when we return back default 256k L2 cache, you will see the drop between L2 and DRAM. And you will see also latency difference for 512k pattern, which cant be cached with 256k L2. The same result with FPM instead of EDO RAM. But latency on L2 will be still the same. It means L2 cache is still working. It seems the used cache test is limited to specific enviroment usual for 486 platform. And usual for 486 = FPM DRAM.

Nice hint about the 512k L2 cache. Will check here.
Looks like you are running it with inflated wait states, correct ?
At least Doom fps and the Speedsys flat lines after L1 section suggest so.
Can you confirm ?

this does not work on v1.5 of the motherboard.
i used yo have version 1.3, but it had some limitations compared to 1.5, so i sold it.

But with the more advanced chipsets L2 performance hits 60 easily, so L2 could improve the range 16K-256K / 16K-512K (slightly)...or would over all memory performance suffer - and if so, why?

Is there any datasheet explaining the so called "enhanced WB cache"? They are all WB, but what makes them enhanced and why not when using 256K or 1MB?

pshipkov wrote on 2024-07-05, 18:31:

this does not work on v1.5 of the motherboard.
i used yo have version 1.3, but it had some limitations compared to 1.5, so i sold it.

Yes, my PB4 is v1.3.

majestyk wrote on 2024-07-05, 18:39:

But with the more advanced chipsets L2 performance hits 60 easily, so L2 could improve the range 16K-256K / 16K-512K (slightly)...or would over all memory performance suffer - and if so, why?

Is there any datasheet explaining the so called "enhanced WB cache"? They are all WB, but what makes them enhanced and why not when using 256K or 1MB?

No datasheet describing "enhanced WB cache" found. It seems L2 cache is WT with default 256k chips. Generaly WB means CPU moves data to L2 and no wait for DRAM.

pshipkov wrote on 2024-07-05, 14:48:

Looks like you are running it with inflated wait states, correct ?
Can you confirm ?

Memory timing in BIOS is on the max preformace limit. Zero wait states and read/write timing 2-1-1.

majestyk wrote on 2024-07-05, 18:39:

But with the more advanced chipsets L2 performance hits 60 easily, so L2 could improve the range 16K-256K / 16K-512K (slightly)...or would over all memory performance suffer - and if so, why?

Is there any datasheet explaining the so called "enhanced WB cache"? They are all WB, but what makes them enhanced and why not when using 256K or 1MB?

I'm skeptical that "Enhanced Write-Back Cache" is just this BIOS' way of saying that there is no L2 cache but the CPU is an L1 WB one. The word "enhanced" is particularly associated with that.

Well, since the BIOS doesn't report how much L2 cache is available, and there's no L2 listed in Speedsys, I could suspect that those who think L2 is disabled may be right ...

H3nrik V! wrote on 2024-08-08, 07:29:

Well, since the BIOS doesn't report how much L2 cache is available, and there's no L2 listed in Speedsys, I could suspect that those who think L2 is disabled may be right ...

Look on the chips. Cachecheck does report. BIOS does report. In default config with 4x original DIP32 Winbond W24512AK-15 is BIOS posting "Cache memory 256k". With 4x ISSI IS61C1024-15N BIOS posts "Enhanced Write Back Cache". With original 256k L2 chache, you can see change in us/kB value between 256 and 512kB test pattern. Why ? Because 512k pattern is bigger than physical 256k L2 chache. So this pattern is not cacheable for now and thanks to this has bigger latency. But with 512kB L2 chache, 512kB Cachecheck test pattern is still cacheable. Thats why you cant see any change in latency value. It means L2 is working.

Write Trough and Write Back is general definition for data handling. It is possible to have WB L1 synchronous cache in CPU and WB L2 async cache on the board. Since the CPU L1 WB/WT scheme is defined in factory, except for some Cyrix 486, then only L2 cache can be changed depending on amount of cache vs DRAM. You cant use WB when less L2 cache installed. 256k is enough for 32MB RAM. For 64MB you need 512k or more.

There are several of us here with 512K and 1024K cached 486 systems, though, and our experience doesn't match what you are describing.
There should still be a "notch" in performance where it drops for memory reads bigger than the cache. It would just move from 256K to 512K or 1024K, accordingly.
Why don't you try disabling external cache in your BIOS and rerun speedsys and cachechk? I think you'll find it's the same as your screenshots above.

Did you get those ISSIs from eBay and if so did you test them with a TL-866 II? About 10% of them are bad.

jakethompson1 wrote on 2024-08-08, 23:34:

... test them with a TL-866 II? About 10% of them are bad.

And when you operate them at the nominal frequency - even with standard timings - another 50% are defective.
Only chance for valid results is using old original (for example Winbond) 15nS chips.

What is the main memory speed before & after?

Yeah this is no L2 cache, remove those chips and speed wont change

rasz_pl wrote on 2024-08-09, 22:06:

Yeah this is no L2 cache, remove those chips and speed wont change

Sure? The same MOBO with FPM DRAM and cache shows L2 latency drop.

Sure that your L2 cache does nothing with EDO, might even slow it all down. Remove L2 cache chips and rerun cachechk.

rasz_pl wrote on 2024-10-20, 21:02:

Sure that your L2 cache does nothing with EDO, might even slow it all down. Remove L2 cache chips and rerun cachechk.

Mea culpa. You are completely right. I have spent a lot of time with testing described MOBO and results are very interestig. I have to tell the first posted idea about 512k L2 cache support feature is absolutly WRONG ! My current results are below:

1) AB-PB4 posts "Enhanced Write Back Cache" everytime, when no cache resolved, or no cache installed. It seems thats only bad BIOS message undestanding.

2) Part of my cache chips was faulty. I have tested them by my XGecu T48 programmer and found bad Tag chip and at least single IS61C1024 cache chip bad also.

3) Tag chip parameters are key factor of success. A have tried original L2 chache chips including tag chip (4x W24512AK-15 + 1x W24129AK-15) and results at 40MHz base clock are very bad. With only different Tag chip (UM61M256) are results much better. In general 15ns chips are too much for base clock more than 33MHz. Better results can be expected with 12 or 10ns chips.

So the conclusion is? Never belive cache chip sellers and never belive the BIOS posts means what you mean 😀

Slightly improved and corrected table added. Tried also 128kB L2 cache for compare. UM61M256 chips seems to be fully stable at the max chipset timing values in BIOS. But still better performance seems to be with L2 cache off.