VOGONS


First post, by Eep386

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Got my hands on another interesting cached 386SX board, a P386SX-25PW made by Prolink.
It unfortunately didn't come with any manual, and TH'99's archives don't even have anything on it. (TH'99 has information on its predecessor, the P386SX-16/20C OPTI (Rev.D), but not this particular board.)
Despite having very limited information on it I got the board working as most of the jumpers for the P386SX-16/20C seem to be similar to those on this board, but there are a few extra present on the -25PW that are not on the -16/20C. I dumped the original AMI BIOS; I also found a suitable MR BIOS for this motherboard's chipset that I am currently testing.

An image of the board (sorry, this is the best I can do with my crusty old Powershot SD1000):

Prolink P386SX-25PW.jpg
Filename
Prolink P386SX-25PW.jpg
File size
800.64 KiB
Views
77 views
File license
Public domain

The original AMI BIOS:

Filename
P386SX25PW.zip
File size
36.47 KiB
Downloads
3 downloads
File license
Fair use/fair dealing exception

The MR BIOS I am testing with the board; this one has the Write Posting and motherboard cache enabled:

Filename
MR BIOS - Opti 82C281 WritePost Cache Enabled.zip
File size
45.89 KiB
Downloads
3 downloads
File license
Fair use/fair dealing exception

Life isn't long enough to re-enable every hidden option in every BIOS on every board... 🙁

Reply 1 of 2, by Eep386

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Identified at last!
https://stason.org/TULARC/pc/motherboards/D/D … 0-25-CACHE.html
Apparently it's also known as a Dash Computer DC-386SX 20/25 Cache.

Life isn't long enough to re-enable every hidden option in every BIOS on every board... 🙁

Reply 2 of 2, by Eep386

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Some updates on this board:

The TH'99 information does *NOT* specify which of the cache chips is Bank 0 or Bank 1.
Bank 0 is U45 and U47.
Bank 1 is U46 and U48.
The board maxes out at 64KB of cache apparently, despite the chipset supposedly being able to cache more. Perhaps the TAGs become a factor? (It's using a pair of 16Kx4 TAG chips)
For 64K, you put a 32Kx8 in U45 and U47, leave U46 and U48 vacant, set JP3-JP5 to 2-3, remove the jumper on JP6 and set JP7.
This means the largest amount of RAM you can put on this before you run out of cacheable range, would be 8MB.

Another gotcha, this time with the MR BIOS that is compatible with this board: MR BIOS seems to enable Memory Reallocation by default and there's no way to turn that off, so CACHECHK will always report that the last meg is uncached, even if it's within the cacheable range. In a 4MB setup, it'll report meg 4 (starting from 0, therefore "Megabyte 5"!) is uncached. The AMI BIOS that comes with the board allows Memory Reallocation to be disabled, fixing this problem.

Life isn't long enough to re-enable every hidden option in every BIOS on every board... 🙁